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Results: 1-12 |
Results: 12
A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter
Authors: Van den Bosch, A Borremans, MAF Steyaert, MSJ Sansen, W
Citation: A. Van Den Bosch et al., A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter, IEEE J SOLI, 36(3), 2001, pp. 315-324
A high-density, matched hexagonal transistor structure in standard CMOS technology for high-speed applications
Authors: Van den Bosch, A Steyaert, MSJ Sansen, W
Citation: A. Van Den Bosch et al., A high-density, matched hexagonal transistor structure in standard CMOS technology for high-speed applications, IEEE SEMIC, 13(2), 2000, pp. 167-172
A high-performance multibit Delta Sigma CMOS ADC
Authors: Geerts, Y Steyaert, MSJ Sansen, W
Citation: Y. Geerts et al., A high-performance multibit Delta Sigma CMOS ADC, IEEE J SOLI, 35(12), 2000, pp. 1829-1840
A 2-V CMOS cellular transceiver front-end
Authors: Steyaert, MSJ Janssens, J De Muer, B Borremans, M Itoh, N
Citation: Msj. Steyaert et al., A 2-V CMOS cellular transceiver front-end, IEEE J SOLI, 35(12), 2000, pp. 1895-1907
Special issue on the 1998 European Solid-State Circuits Conference
Authors: Steyaert, MSJ van Meerbergen, J
Citation: Msj. Steyaert et J. Van Meerbergen, Special issue on the 1998 European Solid-State Circuits Conference, IEEE J SOLI, 34(7), 1999, pp. 910-911
A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications
Authors: Geerts, Y Marques, AM Steyaert, MSJ Sansen, W
Citation: Y. Geerts et al., A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications, IEEE J SOLI, 34(7), 1999, pp. 927-936
A 1-Gb/s, 0.7-mu m CMOS optical receiver with full rail-to-rail output swing
Authors: Ingels, M Steyaert, MSJ
Citation: M. Ingels et Msj. Steyaert, A 1-Gb/s, 0.7-mu m CMOS optical receiver with full rail-to-rail output swing, IEEE J SOLI, 34(7), 1999, pp. 971-977
A 14-bit intrinsic accuracy Q(2) Random Walk CMOS DAC
Authors: Van der Plas, GAM Vandenbussche, J Sansen, W Steyaert, MSJ Gielen, GGE
Citation: Gam. Van Der Plas et al., A 14-bit intrinsic accuracy Q(2) Random Walk CMOS DAC, IEEE J SOLI, 34(12), 1999, pp. 1708-1718
A CMOS dual-channel, 100-MHz to 1.1-GHz transmitter for cable applications
Authors: Borremans, MAF De Ranter, CRC Steyaert, MSJ
Citation: Maf. Borremans et al., A CMOS dual-channel, 100-MHz to 1.1-GHz transmitter for cable applications, IEEE J SOLI, 34(12), 1999, pp. 1904-1913
A 900-mV low-power Delta Sigma A/D converter with 77-dB dynamic range
Authors: Peluso, V Vancorenland, P Marques, AM Steyaert, MSJ Sansen, W
Citation: V. Peluso et al., A 900-mV low-power Delta Sigma A/D converter with 77-dB dynamic range, IEEE J SOLI, 33(12), 1998, pp. 1887-1897
A 12-bit intrinsic accuracy high-speed CMOS DAC
Authors: Bastos, J Marques, AM Steyaert, MSJ Sansen, W
Citation: J. Bastos et al., A 12-bit intrinsic accuracy high-speed CMOS DAC, IEEE J SOLI, 33(12), 1998, pp. 1959-1969
A fully integrated CMOS DCS-1800 frequency synthesizer
Authors: Craninckx, J Steyaert, MSJ
Citation: J. Craninckx et Msj. Steyaert, A fully integrated CMOS DCS-1800 frequency synthesizer, IEEE J SOLI, 33(12), 1998, pp. 2054-2065
Risultati: 1-12 |