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Results: 1-12 |
Results: 12
INVESTIGATION AND DEVELOPMENT OF TRANSPAR ENT RAM TESTING PRINCIPLES
Authors: YARMOLIK VN KLIMETS UV VANDEGOOR A
Citation: Vn. Yarmolik et al., INVESTIGATION AND DEVELOPMENT OF TRANSPAR ENT RAM TESTING PRINCIPLES, Avtomatika i vycislitelnaa tehnika, (6), 1997, pp. 76-85
DIAGNOSTIC-TESTS FOR RAM
Authors: YARMOLIK VN KLIMETS YV VANDEGOOR A
Citation: Vn. Yarmolik et al., DIAGNOSTIC-TESTS FOR RAM, Avtomatika i vycislitelnaa tehnika, (2), 1997, pp. 15-22
DESIGN TECHNIQUE OF TEST PATTERN GENERATO R BASED ON DECIMATION OF M-SEQUENCE PROPERTY
Authors: YARMOLIK VN MURASHKO IA
Citation: Vn. Yarmolik et Ia. Murashko, DESIGN TECHNIQUE OF TEST PATTERN GENERATO R BASED ON DECIMATION OF M-SEQUENCE PROPERTY, Avtomatika i vycislitelnaa tehnika, (1), 1997, pp. 44-56
TRANSPARENT RANDOM-ACCESS MEMORY TESTING FOR PATTERN SENSITIVE FAULTS
Authors: KARPOVSKY MG YARMOLIK VN
Citation: Mg. Karpovsky et Vn. Yarmolik, TRANSPARENT RANDOM-ACCESS MEMORY TESTING FOR PATTERN SENSITIVE FAULTS, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 9(3), 1996, pp. 251-266
PARAMETERS OF ALIASING-FREE SIGNATURE ANA LYZERS FOR RAM
Authors: YARMOLIK VN MIKITYUK VG NIKOLAIDIS M
Citation: Vn. Yarmolik et al., PARAMETERS OF ALIASING-FREE SIGNATURE ANA LYZERS FOR RAM, Avtomatika i vycislitelnaa tehnika, (5), 1996, pp. 73-84
NEW EFFECTIVE ALGORITHM OF RAM TESTING
Authors: YARMOLIK VN MIKITJUK VG
Citation: Vn. Yarmolik et Vg. Mikitjuk, NEW EFFECTIVE ALGORITHM OF RAM TESTING, Avtomatika i vycislitelnaa tehnika, (1), 1996, pp. 61-71
SYNTHESIS OF TRANSFORMERS OF PSEUDORANDOM CODES FOR SELF-TESTING DIGITAL COMPONENTS MEETING THE IEEE STANDARD
Authors: BYKOV YV YARMOLIK VN
Citation: Yv. Bykov et Vn. Yarmolik, SYNTHESIS OF TRANSFORMERS OF PSEUDORANDOM CODES FOR SELF-TESTING DIGITAL COMPONENTS MEETING THE IEEE STANDARD, Automation and remote control, 57(4), 1996, pp. 581-586
A NEW TEST PATTERN GENERATOR DESIGN APPRO ACH FOR VLSI BUILT-IN SELF-TESTING
Authors: YARMOLIK VN MURASHKO IA
Citation: Vn. Yarmolik et Ia. Murashko, A NEW TEST PATTERN GENERATOR DESIGN APPRO ACH FOR VLSI BUILT-IN SELF-TESTING, Avtomatika i vycislitelnaa tehnika, (6), 1995, pp. 25-35
ZERO ALIASING ROM BIST
Authors: KEBICHI O YARMOLIK VN NICOLAIDIS M
Citation: O. Kebichi et al., ZERO ALIASING ROM BIST, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 5(4), 1994, pp. 377-388
CHOICE OF OPTIMAL MULTIPARAMETRIC PROBABILITY-DISTRIBUTIONS OF INPUT VARIABLES FOR PROBABILISTIC TESTING OF DIGITAL CIRCUITS
Authors: BYKOV YV ZAKREVSKII LA YARMOLIK VN
Citation: Yv. Bykov et al., CHOICE OF OPTIMAL MULTIPARAMETRIC PROBABILITY-DISTRIBUTIONS OF INPUT VARIABLES FOR PROBABILISTIC TESTING OF DIGITAL CIRCUITS, Automation and remote control, 55(4), 1994, pp. 576-581
BOUNDARY-SCAN AND ITS APPLICATION TO THE TESTING OF DIGITAL DEVICES
Authors: ZAKREVSKII LA KALOSHA EP KACHAN IV KHATKEVICH NN YARMOLIK VN
Citation: La. Zakrevskii et al., BOUNDARY-SCAN AND ITS APPLICATION TO THE TESTING OF DIGITAL DEVICES, Automation and remote control, 55(1), 1994, pp. 1-20
SYNTHESIS OF TRANSFORMERS OF PSEUDORANDOM CODES FOR TESTING DIGITAL SCHEMES
Authors: BYKOV YV YARMOLIK VN
Citation: Yv. Bykov et Vn. Yarmolik, SYNTHESIS OF TRANSFORMERS OF PSEUDORANDOM CODES FOR TESTING DIGITAL SCHEMES, Automation and remote control, 55(10), 1994, pp. 1518-1523
Risultati: 1-12 |