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Results: 51-75/123
Authors:
COGHLAN BA
JONES JO
Citation: Ba. Coghlan et Jo. Jones, STABLE MEMORY FOR A DISK WRITE CACHE, Microprocessing and microprogramming, 41(1), 1995, pp. 53-70
Authors:
NAVAUX POA
DEROSE CAF
CAVALHEIRO GGH
Citation: Poa. Navaux et al., PERFORMANCE EVALUATION IN IMAGE-PROCESSING WITH GAPP ARRAY PROCESSOR, Microprocessing and microprogramming, 41(1), 1995, pp. 71-82
Authors:
MAJHI AK
PATNAIK LM
RAMAN S
Citation: Ak. Majhi et al., A GENETIC ALGORITHM-BASED CIRCUIT PARTITIONER FOR MCMS, Microprocessing and microprogramming, 41(1), 1995, pp. 83-96
Authors:
MANGER R
GRBIC M
PLANTAMURA VL
SOUCEK B
Citation: R. Manger et al., A PARALLEL SVD ALGORITHM AND ITS APPLICATION TO FINANCIAL RATIO ANALYSIS, Microprocessing and microprogramming, 41(1), 1995, pp. 97-106
Authors:
DIETMULLER PR
Citation: Pr. Dietmuller, VIRUS PROTECTION USING DYNAMIC LINKING, Microprocessing and microprogramming, 40(9), 1994, pp. 599-604
Authors:
GOPAL B
MANOHAR S
Citation: B. Gopal et S. Manohar, VLSI ARCHITECTURE FOR THE WINOGRAD FOURIER-TRANSFORM ALGORITHM, Microprocessing and microprogramming, 40(9), 1994, pp. 605-616
Authors:
GOPI MS
MANOHAR S
Citation: Ms. Gopi et S. Manohar, VLSI ARCHITECTURES FOR THE COMPUTATION OF UNIFORM B-SPLINE CURVES, Microprocessing and microprogramming, 40(9), 1994, pp. 617-626
Authors:
HWANG B
MOON S
Citation: B. Hwang et S. Moon, DESIGN AND EVALUATION OF ACCESS METHOD FOR MULTIDIMENSIONAL OBJECTS IN SPATIAL DATABASES, Microprocessing and microprogramming, 40(9), 1994, pp. 627-650
Authors:
IGNATIUS PP
MURTHY CSR
Citation: Pp. Ignatius et Csr. Murthy, OPTIMAL SCHEDULING OF INDEPENDENT JOBS IN MULTIPROCESSOR SYSTEMS, Microprocessing and microprogramming, 40(9), 1994, pp. 651-672
Authors:
ADAMIDES ED
TSALIDES PG
THANAILAKIS A
Citation: Ed. Adamides et al., BIT-SERIAL VLSI SORTER WITH HIGH-RELIABILITY SPECIFICATIONS, Microprocessing and microprogramming, 40(8), 1994, pp. 523-536
Authors:
CHANDRASEKHARAM R
VINOD VV
SUBRAMANIAN S
Citation: R. Chandrasekharam et al., GENETIC ALGORITHM FOR EMBEDDING A COMPLETE GRAPH IN A HYPERCUBE WITH A VLSI APPLICATION, Microprocessing and microprogramming, 40(8), 1994, pp. 537-552
Authors:
SARKAR S
MAJUMDAR AK
BASU A
Citation: S. Sarkar et al., INTERFACE DESIGN AND CONTROLLER SYNTHESIS OF DIGITAL-SYSTEMS IN AN OBJECT-ORIENTED ENVIRONMENT, Microprocessing and microprogramming, 40(8), 1994, pp. 553-576
Authors:
VENUGOPAL R
SRIKANT YN
Citation: R. Venugopal et Yn. Srikant, SCHEDULING EXPRESSION-TREES WITH REGISTER VARIABLES ON DELAYED-LOAD ARCHITECTURES, Microprocessing and microprogramming, 40(8), 1994, pp. 577-596
Authors:
VAJDA F
Citation: F. Vajda, SHORT NOTES EUROMICRO-94 - INTRODUCTION, Microprocessing and microprogramming, 40(10-12), 1994, pp. 1-1
Authors:
COLLINS R
STEVEN G
Citation: R. Collins et G. Steven, AN EXPLICITLY DECLARED DELAYED-BRANCH MECHANISM FOR A SUPERSCALAR ARCHITECTURE, Microprocessing and microprogramming, 40(10-12), 1994, pp. 677-680
Authors:
LEE M
MIN SL
KIM CS
Citation: M. Lee et al., A WORST-CASE TIMING ANALYSIS TECHNIQUE FOR INSTRUCTION PREFETCH BUFFERS, Microprocessing and microprogramming, 40(10-12), 1994, pp. 681-684
Authors:
BAILEY C
SOTUDEH R
Citation: C. Bailey et R. Sotudeh, HLL ENHANCEMENT FOR STACK BASED PROCESSORS, Microprocessing and microprogramming, 40(10-12), 1994, pp. 685-688
Authors:
FERNANDES EST
SANTOS AD
DEAMORIM CL
Citation: Est. Fernandes et al., CONDITIONAL EXECUTION - AN APPROACH FOR ELIMINATING THE BASIC BLOCK BARRIERS, Microprocessing and microprogramming, 40(10-12), 1994, pp. 689-692
Authors:
ANTOLA A
DISTANTE F
MARCHESE A
Citation: A. Antola et al., HIGH-LEVEL ARCHITECTURAL SYNTHESIS - PRECEDENCE ANALYSIS AND AUTOMATIC CYCLE DETECTION IN DATA-FLOW GRAPHS, Microprocessing and microprogramming, 40(10-12), 1994, pp. 693-696
Authors:
NIJHUIS J
VANAARTSEN H
BARAKOVA E
JANSEN W
SPAANENBURG B
Citation: J. Nijhuis et al., ON THE OPTIMAL MAPPING OF FUZZY RULES ON STANDARD MICRO-CONTROLLERS, Microprocessing and microprogramming, 40(10-12), 1994, pp. 697-700
Authors:
MISKOLCZI J
DUNG TM
TARNAY K
SZABO J
Citation: J. Miskolczi et al., CONFORMANCE TESTING OF X.25 PACKET LEVEL, Microprocessing and microprogramming, 40(10-12), 1994, pp. 703-705
Authors:
PUCKO M
KAPUSKOLAR M
KANDUS G
Citation: M. Pucko et al., AUTOMATED DERIVATION OF PROTOCOLS IMPLEMENTING INTELLIGENT NETWORK SERVICES, Microprocessing and microprogramming, 40(10-12), 1994, pp. 707-710
Authors:
TORO M
ZIEGLER G
Citation: M. Toro et G. Ziegler, VALIDATION OF ABSTRACT TEST SUITES WITH USE OF SDL, Microprocessing and microprogramming, 40(10-12), 1994, pp. 711-714
Authors:
PONCE AM
Citation: Am. Ponce, DOCUMENTING THE PROCESS OF CONFORMANCE TESTING, Microprocessing and microprogramming, 40(10-12), 1994, pp. 715-717
Authors:
ADAMIS G
Citation: G. Adamis, AUTOMATIC PROTOCOL IMPLEMENTATION - GENERATING C(++) CODE FROM SDL PRSPECIFICATIONS/, Microprocessing and microprogramming, 40(10-12), 1994, pp. 719-722