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Results: 1-11 |
Results: 11
Partial bus-invert coding for power optimization of application-specific systems
Authors: Shin, Y Chae, SI Choi, K
Citation: Y. Shin et al., Partial bus-invert coding for power optimization of application-specific systems, IEEE VLSI, 9(2), 2001, pp. 377-383
A high-performance videophone chip with dual multimedia VLIW processor cores
Authors: Kim, JM Shin, YS Hwang, IG Lee, KS Han, SI Park, SG Chae, SI
Citation: Jm. Kim et al., A high-performance videophone chip with dual multimedia VLIW processor cores, IEICE TR EL, E84C(2), 2001, pp. 183-192
Extended mean-distance-ordered search using multiple l(1) and l(2) inequalities for fast vector quantization
Authors: Choi, SY Chae, SI
Citation: Sy. Choi et Si. Chae, Extended mean-distance-ordered search using multiple l(1) and l(2) inequalities for fast vector quantization, IEEE CIR-II, 47(4), 2000, pp. 349-352
nMOS reversible energy recovery logic for ultra-low-energy applications
Authors: Lim, J Kim, DG Chae, SI
Citation: J. Lim et al., nMOS reversible energy recovery logic for ultra-low-energy applications, IEEE J SOLI, 35(6), 2000, pp. 865-875
Rate-optimised motion estimation
Authors: Choi, SY Chae, SI Shim, YS
Citation: Sy. Choi et al., Rate-optimised motion estimation, ELECTR LETT, 36(14), 2000, pp. 1196-1197
Reduction in energy consumption by bootstrapped nMOS switches in reversible adiabatic CMOS circuits
Authors: Lim, J Kim, DG Chae, SI
Citation: J. Lim et al., Reduction in energy consumption by bootstrapped nMOS switches in reversible adiabatic CMOS circuits, IEE P-CIRC, 146(6), 1999, pp. 327-333
Reversible Energy Recovery Logic circuits and its 8-phase clocked power generator for ultra-lot-power applications
Authors: Lim, JH Kim, DG Chae, SI
Citation: Jh. Lim et al., Reversible Energy Recovery Logic circuits and its 8-phase clocked power generator for ultra-lot-power applications, IEICE TR EL, E82C(4), 1999, pp. 646-653
A 2 GHz CMOS downconverter with robust image rejection performance againstthe process variations
Authors: Song, E Chae, SI Kim, W
Citation: E. Song et al., A 2 GHz CMOS downconverter with robust image rejection performance againstthe process variations, J KOR PHYS, 35, 1999, pp. S918-S926
Simple binary wavelet filters for efficient VLSI implementation
Authors: Rassau, AM Chae, SI Eshraghian, K
Citation: Am. Rassau et al., Simple binary wavelet filters for efficient VLSI implementation, ELECTR LETT, 35(7), 1999, pp. 555-557
Hierarchical motion estimation in Hadamard transform domain
Authors: Choi, SY Chae, SI
Citation: Sy. Choi et Si. Chae, Hierarchical motion estimation in Hadamard transform domain, ELECTR LETT, 35(25), 1999, pp. 2187-2188
A cost-effective architecture for HDTV video decoder in ATSC receivers
Authors: Kim, JM Chae, SI
Citation: Jm. Kim et Si. Chae, A cost-effective architecture for HDTV video decoder in ATSC receivers, IEEE CONS E, 44(4), 1998, pp. 1353-1359
Risultati: 1-11 |