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Results:
1-8
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Results: 8
Authors:
GENTINNE B
EGGERMONT JP
FLANDRE D
COLINGE JP
Citation: B. Gentinne et al., FULLY DEPLETED SOI-CMOS TECHNOLOGY FOR HIGH-TEMPERATURE IC APPLICATIONS, Materials science & engineering. B, Solid-state materials for advanced technology, 46(1-3), 1997, pp. 1-7
Authors:
FLANDRE D
VIVIANI A
EGGERMONT JP
GENTINNE B
JESPERS PGA
Citation: D. Flandre et al., IMPROVED SYNTHESIS OF GAIN-BOOSTED REGULATED-CASCODE CMOS STAGES USING SYMBOLIC ANALYSIS AND GM ID METHODOLOGY/, IEEE journal of solid-state circuits, 32(7), 1997, pp. 1006-1012
Authors:
GENTINNE B
FLANDRE D
COLINGE JP
Citation: B. Gentinne et al., MEASUREMENT AND MODELING OF THIN-FILM ACCUMULATION-MODE SOI P-MOSFET INTRINSIC GATE CAPACITANCES, Solid-state electronics, 39(7), 1996, pp. 1071-1078
Authors:
GENTINNE B
FLANDRE D
COLINGE JP
VANDEWIELE F
Citation: B. Gentinne et al., MEASUREMENT AND 2-DIMENSIONAL SIMULATION OF THIN-FILM SOI MOSFETS - INTRINSIC GATE CAPACITANCES AT ELEVATED-TEMPERATURES, Solid-state electronics, 39(11), 1996, pp. 1613-1619
Authors:
INIGUEZ B
FERREIRA LF
GENTINNE B
FLANDRE D
Citation: B. Iniguez et al., A PHYSICALLY-BASED C-INFINITY-CONTINUOUS FULLY-DEPLETED SOI MOSFET MODEL FOR ANALOG APPLICATIONS, I.E.E.E. transactions on electron devices, 43(4), 1996, pp. 568-575
Authors:
EGGERMONT JP
DECEUSTER D
FLANDRE D
GENTINNE B
JESPERS PGA
COLINGE JP
Citation: Jp. Eggermont et al., DESIGN OF SOI CMOS OPERATIONAL-AMPLIFIERS FOR APPLICATIONS UP TO 300-DEGREES-C, IEEE journal of solid-state circuits, 31(2), 1996, pp. 179-186
Authors:
COLINGE JP
CRAHAY A
DECEUSTER D
DESSARD V
GENTINNE B
Citation: Jp. Colinge et al., IMPROVED LOCOS ISOLATION FOR THIN-FILM SOI MOSFETS, Electronics Letters, 32(19), 1996, pp. 1834-1835
Authors:
GENTINNE B
EGGERMONT JP
COLINGE JP
Citation: B. Gentinne et al., PERFORMANCES OF SOI CMOS OTA COMBINING ZTC AND GAIN-BOOSTING TECHNIQUES, Electronics Letters, 31(24), 1995, pp. 2092-2093
Risultati:
1-8
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