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Results: 1-8 |
Results: 8
LOAD OSCILLATIONS CAUSED BY UNSTART OF HYPERSONIC WIND TUNNELS AND ENGINES
Authors: SHIMURA T MITANI T SAKURANAKA N IZUMIKAWA M
Citation: T. Shimura et al., LOAD OSCILLATIONS CAUSED BY UNSTART OF HYPERSONIC WIND TUNNELS AND ENGINES, Journal of propulsion and power, 14(3), 1998, pp. 348-353
LABELING PATTERN OF OKADAIC ACID FROM O-18(2) AND [O-18(2)]ACETATE ELUCIDATED BY COLLISION-INDUCED DISSOCIATION TANDEM MASS-SPECTROMETRY
Authors: MURATA M IZUMIKAWA M TACHIBANA K FUJITA T NAOKI H
Citation: M. Murata et al., LABELING PATTERN OF OKADAIC ACID FROM O-18(2) AND [O-18(2)]ACETATE ELUCIDATED BY COLLISION-INDUCED DISSOCIATION TANDEM MASS-SPECTROMETRY, Journal of the American Chemical Society, 120(1), 1998, pp. 147-151
COMPACT REALIZATION OF PHASE-LOCKED LOOP USING DIGITAL-CONTROL
Authors: IZUMIKAWA M YAMASHINA M
Citation: M. Izumikawa et M. Yamashina, COMPACT REALIZATION OF PHASE-LOCKED LOOP USING DIGITAL-CONTROL, IEICE transactions on electronics, E80C(4), 1997, pp. 544-549
A 0.25-MU-M CMOS-0.9 100-MHZ DSP CORE
Authors: IZUMIKAWA M IGURA H FURUTA K ITO H WAKABAYASHI H NAKAJIMA K MOGAMI T HORIUCHI T YAMASHINA M
Citation: M. Izumikawa et al., A 0.25-MU-M CMOS-0.9 100-MHZ DSP CORE, IEEE journal of solid-state circuits, 32(1), 1997, pp. 52-61
A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS
Authors: IZUMIKAWA M YAMASHINA M
Citation: M. Izumikawa et M. Yamashina, A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS, IEICE transactions on electronics, E79C(7), 1996, pp. 957-962
A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS
Authors: IZUMIKAWA M YAMASHINA M
Citation: M. Izumikawa et M. Yamashina, A CURRENT DIRECTION SENSE TECHNIQUE FOR MULTIPORT SRAMS, IEEE journal of solid-state circuits, 31(4), 1996, pp. 546-551
MEASUREMENT OF CARRIER-INDUCED CHANGES OF THE COMPLEX REFRACTIVE-INDEX IN INGAASP NEAR THE BAND-EDGE
Authors: HANAIZUMI O IZUMIKAWA M KAWAKAMI S
Citation: O. Hanaizumi et al., MEASUREMENT OF CARRIER-INDUCED CHANGES OF THE COMPLEX REFRACTIVE-INDEX IN INGAASP NEAR THE BAND-EDGE, Optics communications, 120(3-4), 1995, pp. 158-165
A 500-MHZ, 32-BIT, 0.4-MU-M CMOS RISC PROCESSOR
Authors: SUZUKI K YAMASHINA M NAKAYAMA T IZUMIKAWA M NOMURA M IGURA H HEIUCHI H GOTO J INOUE T KOSEKI Y ABIKO H OKABE K ONO A YANO Y YAMADA H
Citation: K. Suzuki et al., A 500-MHZ, 32-BIT, 0.4-MU-M CMOS RISC PROCESSOR, IEEE journal of solid-state circuits, 29(12), 1994, pp. 1464-1473
Risultati: 1-8 |