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Results:
1-16
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Results: 16
Authors:
Hwang, CC
Juang, MH
Lai, MJ
Jaing, CC
Chen, JS
Huang, S
Cheng, HC
Citation: Cc. Hwang et al., Effect of rapid-thermal-annealed TiN barrier layer on the Pt/BST/Pt capacitors prepared by RF magnetron co-sputter technique at low substrate temperature, SOL ST ELEC, 45(1), 2001, pp. 121-125
Authors:
Juang, MH
Sun, LC
Chen, WT
Ou-Yang, CI
Citation: Mh. Juang et al., A process simplification scheme for fabricating self-aligned silicided trench-gate power MOSFETs, SOL ST ELEC, 45(1), 2001, pp. 169-172
Authors:
Juang, MH
Harn, SC
Citation: Mh. Juang et Sc. Harn, Formation of shallow p(+)n junctions using different annealing schemes with low thermal budget, JPN J A P 1, 39(3A), 2000, pp. 1066-1069
Authors:
Hwang, CC
Lai, MJ
Jaing, CC
Chen, JS
Huang, S
Juang, MH
Cheng, HC
Citation: Cc. Hwang et al., Low-temperature process to improve the leakage current of (Ba, Sr)TiO3 films on Pt/TiN/Ti/Si substrates, JPN J A P 2, 39(12B), 2000, pp. L1314-L1316
Authors:
Hwang, CC
Jaing, CC
Lai, MJ
Chen, JS
Huang, S
Juang, MH
Cheng, HC
Citation: Cc. Hwang et al., Effect of rapid thermal annealed TiN barrier layer on BST capacitors prepared by RF magnetron cosputter system at low substrate temperatures, EL SOLID ST, 3(12), 2000, pp. 563-565
Authors:
Juang, MH
Citation: Mh. Juang, Study of forming a p(+) poly-Si gate by inductively coupled nitrogen plasma nitridation of the stacked poly-Si layers, J VAC SCI B, 18(4), 2000, pp. 1937-1941
Authors:
Lai, WK
Liu, HW
Juang, MH
Cheng, HC
Citation: Wk. Lai et al., Effects of rapid thermal annealing on cobalt silicided p(+) poly-Si gates fabricated by BF2+ implantation into bilayered CoSi/a-Si films, JPN J A P 1, 38(7A), 1999, pp. 3993-3996
Authors:
Juang, MH
Ou-Yang, CI
Lin, CT
Citation: Mh. Juang et al., Effects of phosphorus dopant on the thermal stability of thin Pd2Si and PtSi silicide films on (100) Si substrates, JPN J A P 1, 38(7A), 1999, pp. 4043-4044
Authors:
Juang, MH
Hu, MC
Yang, CJ
Citation: Mh. Juang et al., Formation of silicided shallow p(+) n junctions by BF2+ implantation into thin amorphous-Si or Ni/amorphous-Si films on Si substrates and subsequent Ni silicidation, J VAC SCI B, 17(2), 1999, pp. 392-396
Authors:
Juang, MH
Citation: Mh. Juang, Various effects of silicidation on shallow p(+) junctions formed by BF2+ implantation into thin poly-Si films on Si substrates, IEEE ELEC D, 20(7), 1999, pp. 348-350
Authors:
Juang, MH
Harn, SC
Citation: Mh. Juang et Sc. Harn, Shallow p(+)n junctions formed by using a two-step annealing scheme with low thermal budget, IEEE ELEC D, 20(12), 1999, pp. 618-620
Authors:
Cheng, HC
Lai, WK
Hwang, CC
Juang, MH
Chu, SC
Liu, TF
Citation: Hc. Cheng et al., Suppression of boron penetration for p(+) stacked poly-Si gates by using inductively coupled N-2 plasma treatment, IEEE ELEC D, 20(10), 1999, pp. 535-537
Authors:
Juang, MH
Ou-Yang, CI
Lin, CT
Tiou, HK
Citation: Mh. Juang et al., Formation of shallow n(+)p junctions by phosphorus implantation into thin polycrystalline-Si films on Si substrates and subsequent cobalt silicidation, SOL ST ELEC, 43(9), 1999, pp. 1763-1767
Authors:
Juang, MH
Li, CT
Citation: Mh. Juang et Ct. Li, Formation of palladium-silicided shallow n(+)p junctions by phosphorus implantation into thin Pd or Pd2Si films on a silicon substrate and subsequentanneal, SOL ST ELEC, 43(7), 1999, pp. 1289-1294
Authors:
Juang, MH
Citation: Mh. Juang, A practical device scheme for designing the dopant profile of source/drainextension region in sub-quarter-micron p-MOSFET's, SOL ST ELEC, 43(12), 1999, pp. 2209-2213
Authors:
Juang, MH
Citation: Mh. Juang, Trade-off and process consideration for scalable poly-Si buffered LOCOS technology, SOL ST ELEC, 43(11), 1999, pp. 2067-2073
Risultati:
1-16
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