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Results: 1-6 |
Results: 6

Authors: PAVANELLO MA MARTINO JA
Citation: Ma. Pavanello et Ja. Martino, A NEW METHOD TO EXTRACT THE EFFECTIVE TRAP DENSITY AT THE BURIED OXIDE UNDERLYING SUBSTRATE INTERFACE IN ENHANCEMENT-MODE SOI MOSFETS AT LOW-TEMPERATURES, Journal de physique. IV, 8(P3), 1998, pp. 45-48

Authors: PAVANELLO MA NICOLETT AS MARTINO JA
Citation: Ma. Pavanello et al., ANALYSIS OF THE SUBSTRATE EFFECT ON ENHANCEMENT-MODE SOI NMOSFET EFFECTIVE CHANNEL-LENGTH AND SERIES RESISTANCE EXTRACTION AT 77 K, Journal de physique. IV, 8(P3), 1998, pp. 49-52

Authors: PAVANELLO MA MARTINO JA COLINGE JP
Citation: Ma. Pavanello et al., ANALYTICAL MODELING OF THE SUBSTRATE EFFECT ON ACCUMULATION-MODE SOI PMOSFETS AT ROOM-TEMPERATURE AND AT 77 K, Microelectronic engineering, 36(1-4), 1997, pp. 375-378

Authors: PAVANELLO MA MARTINO JA COLINGE JP
Citation: Ma. Pavanello et al., ANALYTICAL MODELING OF THE SUBSTRATE INFLUENCES ON ACCUMULATION-MODE SOI PMOSFETS AT ROOM-TEMPERATURE AND AT LIQUID-NITROGEN TEMPERATURE, Solid-state electronics, 41(9), 1997, pp. 1241-1246

Authors: PAVANELLO MA MARTINO JA COLINGE JP
Citation: Ma. Pavanello et al., SUBSTRATE INFLUENCES ON FULLY DEPLETED ENHANCEMENT-MODE SOI MOSFETS AT ROOM-TEMPERATURE AND AT 77 K, Solid-state electronics, 41(1), 1997, pp. 111-119

Authors: PAVANELLO MA MARTINO JA COLINGE JP
Citation: Ma. Pavanello et al., THEORETICAL AND EXPERIMENTAL-STUDY OF THE SUBSTRATE EFFECT ON THE FULLY DEPLETED SOI MOSFET AT LOW-TEMPERATURES, Journal de physique. IV, 6(C3), 1996, pp. 67-72
Risultati: 1-6 |