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Results:
1-22
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Results: 22
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Design-for-testability to achieve complete coverage of delay faults in standard full scan circuits, J SYST ARCH, 47(3-4), 2001, pp. 357-373
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Resynthesis of combinational logic circuits for improved path delay fault testability using comparison units, IEEE VLSI, 9(5), 2001, pp. 679-689
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, A built-in self-test method for diagnosis of synchronous sequential circuits, IEEE VLSI, 9(2), 2001, pp. 290-296
Authors:
Pomeranz, I
Zorian, Y
Citation: I. Pomeranz et Y. Zorian, Testing of scan circuits containing nonisolated random-logic legacy cores, IEEE COMP A, 20(8), 2001, pp. 980-993
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, On diagnosis and diagnostic test generation for pattern-dependent transition faults, IEEE COMP A, 20(6), 2001, pp. 791-800
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Vector replacement to improve static-test compaction for synchronous sequential circuits, IEEE COMP A, 20(2), 2001, pp. 336-342
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Forward-looking fault simulation for improved static compaction, IEEE COMP A, 20(10), 2001, pp. 1262-1265
Authors:
Naftali, T
Novis, B
Pomeranz, I
Leichtman, G
Maor, Y
Shapiro, R
Moskowitz, M
Avidan, B
Avni, Y
Bujanover, Y
Fireman, Z
Citation: T. Naftali et al., Cyclosporin for severe ulcerative colitis, ISR MED ASS, 2(8), 2000, pp. 588-591
Authors:
Zissin, R
Shapiro-Feinberg, M
Oscadchy, A
Pomeranz, I
Leichtmann, G
Novis, B
Citation: R. Zissin et al., Retroperitoneal perforation during endoscopic sphincterotomy: imaging findings, ABDOM IMAG, 25(3), 2000, pp. 279-282
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Static test compaction for scan-based designs to reduce test application time, J ELEC TEST, 16(5), 2000, pp. 541-552
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, On synchronizable circuits and their synchronizing sequences, IEEE COMP A, 19(9), 2000, pp. 1086-1092
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Diagnostic test generation procedure based on test elimination by vector omission for synchronous sequential circuits, IEEE COMP A, 19(5), 2000, pp. 589-600
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, On n-detection test sets and variable n-detection test sets for transitionfaults, IEEE COMP A, 19(3), 2000, pp. 372-383
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Procedures for static compaction of test sequences for synchronous sequential circuits, IEEE COMPUT, 49(6), 2000, pp. 596-607
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, On the use of fully specified initial states for testing of synchronous sequential circuits, IEEE COMPUT, 49(2), 2000, pp. 175-182
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, On finding a minimal functional description of a finite-state machine for test generation for adjacent machines, IEEE COMPUT, 49(1), 2000, pp. 88-94
Authors:
Pomeranz, I
Reddy, SM
Guo, RF
Citation: I. Pomeranz et al., Static test compaction for synchronous sequential circuits based on vectorrestoration, IEEE COMP A, 18(7), 1999, pp. 1040-1049
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, A comment on "Improving a nonenumerative method to estimate path delay fault coverage", IEEE COMP A, 18(5), 1999, pp. 665-666
Authors:
Maor-Kendler, Y
Gabay, G
Bernheim, J
Naftali, T
Lesin, IU
Leichtman, G
Pomeranz, I
Novis, B
Citation: Y. Maor-kendler et al., Expression of bcl-2 in autoimmune and Helicobacter pylori-associated atrophic gastritis, DIG DIS SCI, 44(4), 1999, pp. 680-685
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Cone-based genetic optimization procedure for test generation and its application to n-detections in combinational circuits, IEEE COMPUT, 48(10), 1999, pp. 1145-1152
Authors:
Dabholkar, V
Chakravarty, S
Pomeranz, I
Reddy, S
Citation: V. Dabholkar et al., Techniques for minimizing power dissipation in scan and combinational circuits during test application, IEEE COMP A, 17(12), 1998, pp. 1325-1333
Authors:
Pomeranz, I
Reddy, SM
Citation: I. Pomeranz et Sm. Reddy, Delay fault models for VLSI circuits, INTEGRATION, 26(1-2), 1998, pp. 21-40
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1-22
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