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Table of contents of journal: *IEE proceedings. Computers and digital techniques

Results: 1-25/453
VLSI architecture for quadtree-based fractal image coding
Authors: Lee, S Omachi, S Aso, H
Citation: S. Lee et al., VLSI architecture for quadtree-based fractal image coding, IEE P-COM D, 148(4-5), 2001, pp. 141-146
Low power state assignment and flipflop selection for finite state machinesynthesis - a genetic algorithmic approach
Authors: Chattopadhyay, S
Citation: S. Chattopadhyay, Low power state assignment and flipflop selection for finite state machinesynthesis - a genetic algorithmic approach, IEE P-COM D, 148(4-5), 2001, pp. 147-151
Hardware compiler realising concurrent processes in reconfigurable logic
Authors: Diessel, O Milne, G
Citation: O. Diessel et G. Milne, Hardware compiler realising concurrent processes in reconfigurable logic, IEE P-COM D, 148(4-5), 2001, pp. 152-162
Minimising power dissipation in partial scan sequential circuits
Authors: Nicolici, N Al-Hashimi, BM
Citation: N. Nicolici et Bm. Al-hashimi, Minimising power dissipation in partial scan sequential circuits, IEE P-COM D, 148(4-5), 2001, pp. 163-166
Performance analyses on the generalised buddy system
Authors: Lo, CTD Srisa-an, W Chang, JM
Citation: Ctd. Lo et al., Performance analyses on the generalised buddy system, IEE P-COM D, 148(4-5), 2001, pp. 167-175
Performance analysis of three implementation strategies for distributed lock management
Authors: Knottenbelt, WJ Zertal, S Harrison, PG
Citation: Wj. Knottenbelt et al., Performance analysis of three implementation strategies for distributed lock management, IEE P-COM D, 148(4-5), 2001, pp. 176-187
Memory access optimisation for reconfigurable systems
Authors: Weinhardt, M Luk, W
Citation: M. Weinhardt et W. Luk, Memory access optimisation for reconfigurable systems, IEE P-COM D, 148(3), 2001, pp. 105-112
High-bandwidth x86 instruction fetching based on instruction pointer table
Authors: Chiu, JC Chung, CP
Citation: Jc. Chiu et Cp. Chung, High-bandwidth x86 instruction fetching based on instruction pointer table, IEE P-COM D, 148(3), 2001, pp. 113-118
Multiple-path ATM switch architecture for dynamic VC establishment
Authors: Sheu, TL Lin, GJ
Citation: Tl. Sheu et Gj. Lin, Multiple-path ATM switch architecture for dynamic VC establishment, IEE P-COM D, 148(3), 2001, pp. 119-127
Multiple-level logic simulation algorithm
Authors: Woods, S Casinovi, G
Citation: S. Woods et G. Casinovi, Multiple-level logic simulation algorithm, IEE P-COM D, 148(3), 2001, pp. 129-137
Comment on Lin-Wu (t, n)-threshold verifiable multisecret sharing scheme
Authors: He, WH Wu, TS
Citation: Wh. He et Ts. Wu, Comment on Lin-Wu (t, n)-threshold verifiable multisecret sharing scheme, IEE P-COM D, 148(3), 2001, pp. 139-139
Polyphase related-prime sequences
Authors: Green, DH Green, PR
Citation: Dh. Green et Pr. Green, Polyphase related-prime sequences, IEE P-COM D, 148(2), 2001, pp. 53-62
Reed-Muller tree-based minimisation of fixed polarity Reed-Muller expansions
Authors: Aborhey, S
Citation: S. Aborhey, Reed-Muller tree-based minimisation of fixed polarity Reed-Muller expansions, IEE P-COM D, 148(2), 2001, pp. 63-70
Analysis of disjoint decomposition of balanced Boolean functions through the Walsh spectrum
Authors: Falkowski, BJ Kannurao, S
Citation: Bj. Falkowski et S. Kannurao, Analysis of disjoint decomposition of balanced Boolean functions through the Walsh spectrum, IEE P-COM D, 148(2), 2001, pp. 71-78
Optimal algorithm for tree scheduling with unit time communication delays
Authors: Wajdi, T Imtiaz, A
Citation: T. Wajdi et A. Imtiaz, Optimal algorithm for tree scheduling with unit time communication delays, IEE P-COM D, 148(2), 2001, pp. 79-88
Message latency in k-ary n-cubes with hop-based routing
Authors: Loucif, S Sarbazi-Azad, H Ould-Khaoua, M
Citation: S. Loucif et al., Message latency in k-ary n-cubes with hop-based routing, IEE P-COM D, 148(2), 2001, pp. 89-94
Threshold signature scheme with multiple signing policies
Authors: Lee, NY
Citation: Ny. Lee, Threshold signature scheme with multiple signing policies, IEE P-COM D, 148(2), 2001, pp. 95-99
Deniable authentication protocols
Authors: Deng, X Lee, CH Zhu, H
Citation: X. Deng et al., Deniable authentication protocols, IEE P-COM D, 148(2), 2001, pp. 101-104
Efficient coverage analysis metric for HDL design validation
Authors: Liu, CN Jou, JY
Citation: Cn. Liu et Jy. Jou, Efficient coverage analysis metric for HDL design validation, IEE P-COM D, 148(1), 2001, pp. 1-6
PLI logic for multiple-valued functions
Authors: Falkowski, BJ Rahardja, S
Citation: Bj. Falkowski et S. Rahardja, PLI logic for multiple-valued functions, IEE P-COM D, 148(1), 2001, pp. 7-14
Dynamic synchronous bandwidth allocation scheme for hard veal-time communication in FDDI networks
Authors: Harmanci, FB Harmanci, E
Citation: Fb. Harmanci et E. Harmanci, Dynamic synchronous bandwidth allocation scheme for hard veal-time communication in FDDI networks, IEE P-COM D, 148(1), 2001, pp. 15-21
Finite state machine encoding for VHDL synthesis
Authors: Kuusilinna, K Lahtinen, V Hamalainen, T Saarinen, J
Citation: K. Kuusilinna et al., Finite state machine encoding for VHDL synthesis, IEE P-COM D, 148(1), 2001, pp. 23-30
Optimisation in behavioural synthesis using hierarchical expansion: Moduleripping
Authors: Williams, AC Brown, AD Baidas, Z
Citation: Ac. Williams et al., Optimisation in behavioural synthesis using hierarchical expansion: Moduleripping, IEE P-COM D, 148(1), 2001, pp. 31-43
Weaknesses of protocols for updating the parameters of an established threshold scheme
Authors: Martin, KM Nakahara, J
Citation: Km. Martin et J. Nakahara, Weaknesses of protocols for updating the parameters of an established threshold scheme, IEE P-COM D, 148(1), 2001, pp. 45-48
Efficient RNS-to-binary conversion using high-radix SRT division
Authors: Burgess, N
Citation: N. Burgess, Efficient RNS-to-binary conversion using high-radix SRT division, IEE P-COM D, 148(1), 2001, pp. 49-52
Risultati: 1-25 | 26-50 | 51-75 | 76-100 | >>