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Results: 26-50/453
Authors:
Sato, T
Citation: T. Sato, Evaluating trace cache on moderate-scale processors, IEE P-COM D, 147(6), 2000, pp. 369-374
Authors:
Tsai, WC
Wang, SJ
Citation: Wc. Tsai et Sj. Wang, Two systolic architectures for multiplication in GF(2(m)), IEE P-COM D, 147(6), 2000, pp. 375-382
Authors:
Williams, AC
Brown, AD
Zwolinski, M
Citation: Ac. Williams et al., Simultaneous optimisation of dynamic power, area and delay in behavioural synthesis, IEE P-COM D, 147(6), 2000, pp. 383-390
Authors:
Harkin, J
McGinnity, TM
Maguire, LP
Citation: J. Harkin et al., Partitioning methodology for dynamically reconfigurable embedded systems, IEE P-COM D, 147(6), 2000, pp. 391-396
Authors:
Khan, GN
Wei, G
Citation: Gn. Khan et G. Wei, Fault-tolerant wormhole routing using a variation of the distributed recovery block approach, IEE P-COM D, 147(6), 2000, pp. 397-402
Authors:
Chen, YS
Chen, CY
Citation: Ys. Chen et Cy. Chen, Multinode broadcasting in a wormhole-routed 2-D torus using an aggregation-then-distribution strategy, IEE P-COM D, 147(6), 2000, pp. 403-413
Authors:
Chen, SS
Yang, CH
Chen, SJ
Citation: Ss. Chen et al., Bubble-sort approach to channel routing, IEE P-COM D, 147(6), 2000, pp. 415-422
Authors:
Solana, JM
Manzano, MA
Citation: Jm. Solana et Ma. Manzano, Limited maximum fault-multiplicity diagnosis procedure for scan designs, IEE P-COM D, 147(6), 2000, pp. 423-433
Authors:
Vijaykrishnan, N
Ranganathan, N
Citation: N. Vijaykrishnan et N. Ranganathan, Supporting object accesses in a Java processor, IEE P-COM D, 147(6), 2000, pp. 435-443
Authors:
Theodoridis, G
Theoharis, S
Soudris, D
Goutis, C
Citation: G. Theodoridis et al., Switching activity estimation under real-gate delay using timed Boolean functions, IEE P-COM D, 147(6), 2000, pp. 444-450
Authors:
Jabir, A
Saul, J
Citation: A. Jabir et J. Saul, Heuristic AND-OR-EXOR three-level minimisation algorithm for multiple-output incompletely-specified Boolean functions, IEE P-COM D, 147(6), 2000, pp. 451-461
Authors:
Sun, HM
Citation: Hm. Sun, Design of time-stamped proxy signatures with traceable receivers, IEE P-COM D, 147(6), 2000, pp. 462-466
Authors:
Russell, G
Maamar, AH
Citation: G. Russell et Ah. Maamar, Check bit prediction scheme using Dong's code for concurrent error detection in VLSI processors, IEE P-COM D, 147(6), 2000, pp. 467-471
Authors:
Cabodi, G
Camurati, P
Passerone, C
Quer, S
Citation: G. Cabodi et al., Exploiting timed transition relations in sequential cycle-based simulationof embedded systems, IEE P-COM D, 147(5), 2000, pp. 305-312
Authors:
Nicolici, N
Al-Hashimi, BM
Williams, AC
Citation: N. Nicolici et al., Minimisation of power dissipation during test application in full-scan sequential circuits using primary input freezing, IEE P-COM D, 147(5), 2000, pp. 313-322
Authors:
Walter, CD
Citation: Cd. Walter, Improved linear systolic array for fast modular exponentiation, IEE P-COM D, 147(5), 2000, pp. 323-328
Authors:
Jones, S
Citation: S. Jones, Partial-matching lossless data compression hardware, IEE P-COM D, 147(5), 2000, pp. 329-334
Authors:
Sudha, N
Nandi, S
Sridharan, K
Citation: N. Sudha et al., Cellular architecture for Euclidean distance transformation, IEE P-COM D, 147(5), 2000, pp. 335-342
Authors:
Rau, JC
Jone, WB
Chang, SC
Wu, YL
Citation: Jc. Rau et al., Tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits, IEE P-COM D, 147(5), 2000, pp. 343-348
Authors:
Drechsler, R
Becker, B
Drechsler, N
Citation: R. Drechsler et al., Genetic algorithm for minimisation of fixed polarity Reed-Muller expressions, IEE P-COM D, 147(5), 2000, pp. 349-353
Authors:
Sesmun, A
Turner, LF
Citation: A. Sesmun et Lf. Turner, Using performability in the design of communication networks, IEE P-COM D, 147(5), 2000, pp. 355-363
Authors:
He, WH
Wu, TC
Citation: Wh. He et Tc. Wu, Security of the Jan-Tseng integrated schemes for user authentication and access control, IEE P-COM D, 147(5), 2000, pp. 365-368
Authors:
Theoharis, S
Theodoridis, G
Merakos, P
Goutis, C
Citation: S. Theoharis et al., Accurate data path models for fast RT-level power estimation, IEE P-COM D, 147(4), 2000, pp. 209-214
Authors:
Yan, JT
Citation: Jt. Yan, Hierarchical bubble-sorting-based non-Manhattan channel routing, IEE P-COM D, 147(4), 2000, pp. 215-220
Authors:
Redinbo, GR
Citation: Gr. Redinbo, Protecting data compression: arithmetic coding, IEE P-COM D, 147(4), 2000, pp. 221-228