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Results: 1-11 |
Results: 11
A NEW HOT-CARRIER DEGRADATION LAW FOR MOSFET LIFETIME PREDICTION
Authors: MARCHAND B GHIBAUDO G BALESTRA F GUEGAN G DELEONIBUS S
Citation: B. Marchand et al., A NEW HOT-CARRIER DEGRADATION LAW FOR MOSFET LIFETIME PREDICTION, Microelectronics and reliability, 38(6-8), 1998, pp. 1103-1107
IS THERE LOCOS AFTER LOCOS
Authors: DELEONIBUS S
Citation: S. Deleonibus, IS THERE LOCOS AFTER LOCOS, Solid-state electronics, 41(7), 1997, pp. 1027-1039
ELIMINATION OF STRESS-INDUCED DEFECTS IN POLYBUFFERED LOCOS ISOLATIONSCHEME FOR SUB-0.25-MU-M DESIGNS
Authors: DELEONIBUS S MARTIN F HEITZMANN M GUIBERT JC PAPON AM
Citation: S. Deleonibus et al., ELIMINATION OF STRESS-INDUCED DEFECTS IN POLYBUFFERED LOCOS ISOLATIONSCHEME FOR SUB-0.25-MU-M DESIGNS, Journal of the Electrochemical Society, 144(6), 1997, pp. 164-166
HIGH-PRESSURE HIGH-TEMPERATURE STEAM OXIDATION POLY BUFFER LOCOS (HP-HTPBL) FIELD ISOLATION PROCESS FOR REDUCED ENCROACHMENT AND LOW-STRESS
Authors: DELEONIBUS S MARTIN F KIM SS EMAMI A FLORIN B HEITZMANN M LEROUX C
Citation: S. Deleonibus et al., HIGH-PRESSURE HIGH-TEMPERATURE STEAM OXIDATION POLY BUFFER LOCOS (HP-HTPBL) FIELD ISOLATION PROCESS FOR REDUCED ENCROACHMENT AND LOW-STRESS, JPN J A P 2, 35(9B), 1996, pp. 1169-1172
DIFFERENTIAL BODY EFFECT ANALYSIS AND OPTIMIZATION OF THE LARGE TILT IMPLANTED SLOPED SHALLOW TRENCH ISOLATION PROCESS (LATI-STI)
Authors: DELEONIBUS S HEITZMANN M GOBIL Y MARTIN F DEMOLLIENS O GUIBERT JC TOFFOLI A
Citation: S. Deleonibus et al., DIFFERENTIAL BODY EFFECT ANALYSIS AND OPTIMIZATION OF THE LARGE TILT IMPLANTED SLOPED SHALLOW TRENCH ISOLATION PROCESS (LATI-STI), JPN J A P 2, 35(8A), 1996, pp. 971-973
HIGH-TEMPERATURE LOCAL OXIDATION OF SILICON FIELD ISOLATION MORPHOLOGICAL CHARACTERIZATION
Authors: DELEONIBUS S
Citation: S. Deleonibus, HIGH-TEMPERATURE LOCAL OXIDATION OF SILICON FIELD ISOLATION MORPHOLOGICAL CHARACTERIZATION, Journal of the Electrochemical Society, 143(11), 1996, pp. 259-261
EXPERIMENTAL REQUIREMENTS FOR SURFACE-CHARGE SPECTROSCOPY (SCS) MEASUREMENTS - EXAMPLES OF SCS MEASUREMENTS ON HIGH-RESISTIVITY AND LOW-RESISTIVITY SI SAMPLES
Authors: ERMOLIEFF A CHARRASIN V MARTHON S PIAGUET J DELEONIBUS S
Citation: A. Ermolieff et al., EXPERIMENTAL REQUIREMENTS FOR SURFACE-CHARGE SPECTROSCOPY (SCS) MEASUREMENTS - EXAMPLES OF SCS MEASUREMENTS ON HIGH-RESISTIVITY AND LOW-RESISTIVITY SI SAMPLES, Surface and interface analysis, 23(3), 1995, pp. 137-147
STUDY OF SIO2 SI INTERFACE STATES IN MOS DEVICES BY SURFACE-CHARGE SPECTROSCOPY - APPLICATION TO RAPID THERMAL NITRIDATION OF SILICON/
Authors: ERMOLIEFF A DELEONIBUS S MARTHON S BLANCHARD B PIAGUET J
Citation: A. Ermolieff et al., STUDY OF SIO2 SI INTERFACE STATES IN MOS DEVICES BY SURFACE-CHARGE SPECTROSCOPY - APPLICATION TO RAPID THERMAL NITRIDATION OF SILICON/, Journal of electron spectroscopy and related phenomena, 67(3), 1994, pp. 409-416
HIGH-PRESSURE AND HIGH-TEMPERATURE FURNACE OXIDATION FOR ADVANCED POLY-BUFFERED LOCOS
Authors: KIM SS EMAMI A DELEONIBUS S
Citation: Ss. Kim et al., HIGH-PRESSURE AND HIGH-TEMPERATURE FURNACE OXIDATION FOR ADVANCED POLY-BUFFERED LOCOS, Solid state technology, 37(11), 1994, pp. 67
OPTIMIZATION OF ULTRATHIN GATE OXIDE IN A SILO RTN ISOLATION PROCESS FOR ADVANCED ULSI - INTRODUCING A NEW CONCEPT OF SURFACE GETTERING/
Authors: DELEONIBUS S MARTIN F BLANCHARD B ERMOLIEFF A PAPON AM
Citation: S. Deleonibus et al., OPTIMIZATION OF ULTRATHIN GATE OXIDE IN A SILO RTN ISOLATION PROCESS FOR ADVANCED ULSI - INTRODUCING A NEW CONCEPT OF SURFACE GETTERING/, Journal of the Electrochemical Society, 141(10), 1994, pp. 2811-2820
EXPLORATION OF LOCOS-TYPE ISOLATION LIMIT USING SUPERSILO ISOLATION BY RAPID THERMAL NITRIDATION OF SILICON
Authors: DELEONIBUS S MARTIN F DEPONTCHARRA JD TEDESCO S
Citation: S. Deleonibus et al., EXPLORATION OF LOCOS-TYPE ISOLATION LIMIT USING SUPERSILO ISOLATION BY RAPID THERMAL NITRIDATION OF SILICON, Journal of the Electrochemical Society, 140(10), 1993, pp. 2908-2916
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