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Results:
1-17
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Results: 17
Authors:
Min, K
Lamb, HH
Hauser, JR
Citation: K. Min et al., Time-dependent Si etch behavior and its effect on oxide/Si selectivity in CF4+D-2 electron cyclotron resonance plasma etching, J VAC SCI B, 19(3), 2001, pp. 695-700
Authors:
Hauser, JR
Citation: Jr. Hauser, Metrics thermostat, J PROD INN, 18(3), 2001, pp. 134-153
Authors:
Wang, ZG
Parker, CG
Hodge, DW
Croswell, RT
Yang, N
Misra, V
Hauser, JR
Citation: Zg. Wang et al., Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks, IEEE ELEC D, 21(4), 2000, pp. 170-172
Authors:
Simester, DI
Hauser, JR
Wernerfelt, B
Rust, RT
Citation: Di. Simester et al., Implementing quality improvement programs designed to enhance customer satisfaction: Quasi-experiments in the United States and Spain, J MARKET C, 37(1), 2000, pp. 102-112
Authors:
Ahmed, K
Ibok, E
Bains, G
Chi, D
Ogle, B
Wortman, JJ
Hauser, JR
Citation: K. Ahmed et al., Comparative physical and electrical metrology of ultrathin oxides in the 6to 1.5 nm regime, IEEE DEVICE, 47(7), 2000, pp. 1349-1354
Authors:
Yang, N
Henson, WK
Hauser, JR
Wortman, JJ
Citation: N. Yang et al., Estimation of the effects of remote charge scattering on electron mobilityof n-MOSFET's with ultrathin gate oxides, IEEE DEVICE, 47(2), 2000, pp. 440-447
Authors:
Ahmed, K
Wortman, JJ
Hauser, JR
Citation: K. Ahmed et al., A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides, IEEE DEVICE, 47(11), 2000, pp. 2236-2237
Authors:
Callahan, TJ
Hauser, JR
Wawrzynek, J
Citation: Tj. Callahan et al., The Garp architecture and C compiler, COMPUTER, 33(4), 2000, pp. 62
Authors:
Carter, RJ
Hauser, JR
Nemanich, RJ
Citation: Rj. Carter et al., Surface residue island nucleation in anhydrous HF/alcohol vapor processingof Si surfaces, J ELCHEM SO, 147(9), 2000, pp. 3512-3518
Authors:
Misra, V
Lazar, H
Wang, Z
Wu, Y
Niimi, H
Lucovsky, G
Wortman, JJ
Hauser, JR
Citation: V. Misra et al., Interfacial properties of ultrathin pure silicon nitride formed by remote plasma enhanced chemical vapor deposition, J VAC SCI B, 17(4), 1999, pp. 1836-1839
Authors:
Ibok, E
Ahmed, K
Hao, MY
Ogle, B
Wortman, JJ
Hauser, JR
Citation: E. Ibok et al., Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics, IEEE ELEC D, 20(9), 1999, pp. 442-444
Authors:
Henson, WK
Ahmed, KZ
Vogel, EM
Hauser, JR
Wortman, JJ
Venables, RD
Xu, M
Venables, D
Citation: Wk. Henson et al., Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors, IEEE ELEC D, 20(4), 1999, pp. 179-181
Authors:
Shanware, A
Massoud, HZ
Acker, A
Li, VZQ
Mirabedini, MR
Henson, K
Hauser, JR
Wortman, JJ
Citation: A. Shanware et al., The effects of Ge content in poly-Si1-xGex gate material on the tunneling barrier in PMOS devices, MICROEL ENG, 48(1-4), 1999, pp. 39-42
Authors:
Shanware, A
Massoud, HZ
Vogel, E
Henson, K
Hauser, JR
Wortman, JJ
Citation: A. Shanware et al., Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and SiO2/Ta2O5 dielectrics with oxide scaling, MICROEL ENG, 48(1-4), 1999, pp. 295-298
Authors:
Ahmed, K
Ibok, E
Yeap, GCF
Xiang, Q
Ogle, B
Wortman, JJ
Hauser, JR
Citation: K. Ahmed et al., Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-angstrom gate oxide MOSFET's, IEEE DEVICE, 46(8), 1999, pp. 1650-1655
Authors:
Yang, N
Henson, WK
Hauser, JR
Wortman, JJ
Citation: N. Yang et al., Modeling study of ultrathin gate oxides using direct tunneling current andcapacitance-voltage measurements in MOS devices, IEEE DEVICE, 46(7), 1999, pp. 1464-1471
Authors:
Hauser, JR
Citation: Jr. Hauser, Research, development, and engineering metrics, MANAG SCI, 44(12), 1998, pp. 1670-1689
Risultati:
1-17
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