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Results: 1-16 |
Results: 16
Merged analog-digital circuits using pulse modulation for intelligent SoC applications
Authors: Iwata, A Morie, T Nagata, M
Citation: A. Iwata et al., Merged analog-digital circuits using pulse modulation for intelligent SoC applications, IEICE T FUN, E84A(2), 2001, pp. 486-496
A PWM analog memory programming circuit for floating-gate MOSFETs with 75-mu s programming time and 11-bit updating resolution
Authors: Kinoshita, S Morie, T Nagata, M Iwata, A
Citation: S. Kinoshita et al., A PWM analog memory programming circuit for floating-gate MOSFETs with 75-mu s programming time and 11-bit updating resolution, IEEE J SOLI, 36(8), 2001, pp. 1286-1290
Physical design guides for substrate noise reduction in CMOS digital circuits
Authors: Nagata, M Nagai, J Hijikata, K Morie, T Iwata, A
Citation: M. Nagata et al., Physical design guides for substrate noise reduction in CMOS digital circuits, IEEE J SOLI, 36(3), 2001, pp. 539-549
Water-assisted repair of plasma-induced damage in the silicon/silicon-dioxide system
Authors: Itsumi, M Maeda, M Takeuchi, H Morie, T
Citation: M. Itsumi et al., Water-assisted repair of plasma-induced damage in the silicon/silicon-dioxide system, J VAC SCI B, 18(3), 2000, pp. 1268-1275
CMOS circuits generating arbitrary chaos by using pulsewidth modulation techniques
Authors: Morie, T Sakabayashi, S Nagata, M Iwata, A
Citation: T. Morie et al., CMOS circuits generating arbitrary chaos by using pulsewidth modulation techniques, IEEE CIRC-I, 47(11), 2000, pp. 1652-1657
A method for improving reusability of design procedures of analog circuits- Storage and reuse of design constraints and uncertain parameters
Authors: Morie, T Onodera, H Tamaru, K
Citation: T. Morie et al., A method for improving reusability of design procedures of analog circuits- Storage and reuse of design constraints and uncertain parameters, ELEC C JP 3, 83(5), 2000, pp. 62-75
A single-electron stochastic associative processing circuit robust to random background-charge effects and its structure using nanocrystal floating-gate transistors
Authors: Yamanaka, T Morie, T Nagata, M Iwata, A
Citation: T. Yamanaka et al., A single-electron stochastic associative processing circuit robust to random background-charge effects and its structure using nanocrystal floating-gate transistors, NANOTECHNOL, 11(3), 2000, pp. 154-160
An analog-digital merged neural circuit using pulse width modulation technique
Authors: Morie, T Funakoshi, J Nagata, M Iwata, A
Citation: T. Morie et al., An analog-digital merged neural circuit using pulse width modulation technique, ANALOG IN C, 25(3), 2000, pp. 319-328
A nonlinear oscillator network for gray-level image segmentation and PWM/PPM circuits for its VLSI implementation
Authors: Ando, H Morie, T Nagata, M Iwata, A
Citation: H. Ando et al., A nonlinear oscillator network for gray-level image segmentation and PWM/PPM circuits for its VLSI implementation, IEICE T FUN, E83A(2), 2000, pp. 329-336
Quantum-dot structures measuring Hamming distance for associative memories
Authors: Morie, T Matsuura, T Miyata, S Yamanaka, T Nagata, M Iwata, A
Citation: T. Morie et al., Quantum-dot structures measuring Hamming distance for associative memories, SUPERLATT M, 27(5-6), 2000, pp. 613-616
Measurements and analyses of substrate noise waveform in mixed-signal IC environment
Authors: Nagata, M Nagai, J Morie, T Iwata, A
Citation: M. Nagata et al., Measurements and analyses of substrate noise waveform in mixed-signal IC environment, IEEE COMP A, 19(6), 2000, pp. 671-678
The architecture of delta sigma analog-to-digital converters using a voltage-controlled oscillator as a multibit quantizer
Authors: Iwata, A Sakimura, N Nagata, M Morie, T
Citation: A. Iwata et al., The architecture of delta sigma analog-to-digital converters using a voltage-controlled oscillator as a multibit quantizer, IEEE CIR-II, 46(7), 1999, pp. 941-945
New non-volatile analog memory circuits using PWM methods
Authors: Kinoshita, S Morie, T Nagata, M Iwata, A
Citation: S. Kinoshita et al., New non-volatile analog memory circuits using PWM methods, IEICE TR EL, E82C(9), 1999, pp. 1655-1661
An analog-digital merged neural circuit using pulse width modulation technique
Authors: Morie, T Funakoshi, J Nagata, M Iwata, A
Citation: T. Morie et al., An analog-digital merged neural circuit using pulse width modulation technique, IEICE T FUN, E82A(2), 1999, pp. 356-363
Analog LSI implementation of self-learning neural networks
Authors: Morie, T Uchimura, K Amemiya, Y
Citation: T. Morie et al., Analog LSI implementation of self-learning neural networks, COMPUT ELEC, 25(5), 1999, pp. 339-355
Analog VLSI implementation of self-learning neural networks
Authors: Morie, T
Citation: T. Morie, Analog VLSI implementation of self-learning neural networks, KLUW S ANAL, 512, 1999, pp. 213-242
Risultati: 1-16 |