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Results: 1-10 |
Results: 10
The effects of super-steep-retrograde indium channel profile on deep submicron n-channel metal-oxide-semiconductor field-effect transistor
Authors: Chen, CM Chang, SJ Chou, JW Lin, T Yeh, WK Chang, CY Luo, WZ Lee, YJ Chao, TS Huang, TY
Citation: Cm. Chen et al., The effects of super-steep-retrograde indium channel profile on deep submicron n-channel metal-oxide-semiconductor field-effect transistor, JPN J A P 1, 40(1), 2001, pp. 75-79
Optimum treatment for improvement of indium-halo structure for sub-0.1 mu m n-type metal-oxide-semiconductor field-effect transistor
Authors: Yeh, WK Chou, JW
Citation: Wk. Yeh et Jw. Chou, Optimum treatment for improvement of indium-halo structure for sub-0.1 mu m n-type metal-oxide-semiconductor field-effect transistor, JPN J A P 2, 40(11A), 2001, pp. L1139-L1141
Temperature dependency of 0.1 mu m partially depleted SOICMOSFET
Authors: Yeh, WK Huang, CS Chen, MC
Citation: Wk. Yeh et al., Temperature dependency of 0.1 mu m partially depleted SOICMOSFET, IEEE ELEC D, 22(7), 2001, pp. 339-341
Thermal effect of 0.1 mu m partially depleted SOICMOSFET
Authors: Yeh, WK Huang, C Chen, TF Hsu, S Liu, J Liou, FT
Citation: Wk. Yeh et al., Thermal effect of 0.1 mu m partially depleted SOICMOSFET, MICROEL ENG, 59(1-4), 2001, pp. 475-482
Identification and characterization of a monofunctional glycosyltransferase from Staphylococcus aureus
Authors: Wang, QM Peery, RB Johnson, RB Alborn, WE Yeh, WK Skatrud, PL
Citation: Qm. Wang et al., Identification and characterization of a monofunctional glycosyltransferase from Staphylococcus aureus, J BACT, 183(16), 2001, pp. 4779-4785
Optimum halo structure for sub-0.1 mu m CMOSFETs
Authors: Yeh, WK Chou, JW
Citation: Wk. Yeh et Jw. Chou, Optimum halo structure for sub-0.1 mu m CMOSFETs, IEEE DEVICE, 48(10), 2001, pp. 2357-2362
A low thermal budget high performance 0.25-0.18 mu m merged logic device and dynamic random access memory application
Authors: Yeh, WK Lin, YC Chen, TP Huang, CT Chang, SJ Lin, WJ Jung, LT Chien, SC Sun, SW Liou, FT
Citation: Wk. Yeh et al., A low thermal budget high performance 0.25-0.18 mu m merged logic device and dynamic random access memory application, JPN J A P 1, 39(4B), 2000, pp. 2162-2166
Membrane-associated echinocandin B deacylase of Actinoplanes utahensis: purification, characterization, heterologous cloning and enzymatic deacylation reaction
Authors: Kreuzman, AJ Hodges, RL Swartling, JR Pohl, TE Ghag, SK Baker, PJ McGilvray, D Yeh, WK
Citation: Aj. Kreuzman et al., Membrane-associated echinocandin B deacylase of Actinoplanes utahensis: purification, characterization, heterologous cloning and enzymatic deacylation reaction, J IND MIC B, 24(3), 2000, pp. 173-180
A novel sacrificial gate stack process for suppression of boron penetration in p-MOSFET with shallow BF2-implanted source/drain extension
Authors: Chang, SJ Chang, CY Chao, TS Zhong, SZ Yeh, WK Huang, TY
Citation: Sj. Chang et al., A novel sacrificial gate stack process for suppression of boron penetration in p-MOSFET with shallow BF2-implanted source/drain extension, IEEE ELEC D, 21(8), 2000, pp. 381-383
A novel shallow trench isolation with mini-spacer technology
Authors: Yeh, WK Lin, T Chen, CM Chou, JW Sun, SW
Citation: Wk. Yeh et al., A novel shallow trench isolation with mini-spacer technology, JPN J A P 1, 38(4B), 1999, pp. 2300-2305
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