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Results: 26-50/50
Authors:
HSIAO PY
LIN CY
SHEW PW
Citation: Py. Hsiao et al., OPTIMAL TILE PARTITION FOR SPACE REGION OF INTEGRATED-CIRCUITS GEOMETRY, IEE proceedings. Part E. Computers and digital techniques, 140(3), 1993, pp. 145-153
Authors:
YOUSSEF M
SAVARIA Y
KAMINSKA B
Citation: M. Youssef et al., METHODOLOGY FOR EFFICIENTLY INSERTING AND CONDENSING TEST POINTS, IEE proceedings. Part E. Computers and digital techniques, 140(3), 1993, pp. 154-160
Authors:
LU SK
WU CW
KUO SY
Citation: Sk. Lu et al., ENHANCING TESTABILITY OF VLSI ARRAYS FOR FAST FOURIER-TRANSFORM, IEE proceedings. Part E. Computers and digital techniques, 140(3), 1993, pp. 161-166
Authors:
KORCHEV DV
Citation: Dv. Korchev, MODULAR ARCHITECTURE FOR HIGH-PERFORMANCE IMPLEMENTATION OF 2-DIMENSIONAL FAST FOURIER-TRANSFORM, IEE proceedings. Part E. Computers and digital techniques, 140(3), 1993, pp. 167-173
Authors:
HUANG WK
LOMBARDI F
Citation: Wk. Huang et F. Lombardi, SELF-TESTING APPROACHES FOR VLSI ARRAYS, IEE proceedings. Part E. Computers and digital techniques, 140(3), 1993, pp. 175-183
Authors:
YAKOVLEV A
Citation: A. Yakovlev, STRUCTURAL TECHNIQUE FOR FAULT-MASKING IN ASYNCHRONOUS INTERFACES, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 81-91
Authors:
TRUONG TK
REED IS
SHIH MT
Citation: Tk. Truong et al., EFFICIENT MULTIPLICATION ALGORITHM OVER THE FINITE-FIELDS GF(Q(M)) WHERE Q = 3, 5, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 92-94
Authors:
PAN Y
CHUANG HYH
Citation: Y. Pan et Hyh. Chuang, FASTER LINE DETECTION ALGORITHMS ON ENHANCED MESH-CONNECTED ARRAYS, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 95-100
Authors:
KORCHEV DV
KANEVSKY JS
Citation: Dv. Korchev et Js. Kanevsky, PROCESSOR ARRAYS FOR 2-DIMENSIONAL DISCRETE FOURIER-TRANSFORM, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 101-104
Authors:
XU L
ALMAINI AEA
MILLER JF
MCKENZIE L
Citation: L. Xu et al., REED-MULLER UNIVERSAL LOGIC MODULE NETWORKS, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 105-108
Authors:
SCHARCANSKI J
SHEN HC
DASILVA APA
Citation: J. Scharcanski et al., COLOR QUANTIZATION FOR COLOR TEXTURE ANALYSIS, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 109-114
Authors:
ZIAVRAS SG
Citation: Sg. Ziavras, MAPPING SINGLE AND MULTIPLE MULTILEVEL STRUCTURES ONTO THE HYPERCUBE, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 115-118
Authors:
PUCKNELL DA
Citation: Da. Pucknell, EVENT-DRIVEN LOGIC (EDL) APPROACH TO DIGITAL-SYSTEMS REPRESENTATION AND RELATED DESIGN PROCESSES, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 119-126
Authors:
MITTAL R
JAIN BN
PATNEY RK
Citation: R. Mittal et al., LINK AUGMENTED BINARY (LAB)-TREE ARCHITECTURE, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 127-133
Authors:
HASSANEIN HS
KAMAL AE
Citation: Hs. Hassanein et Ae. Kamal, STUDY OF THE BEHAVIOR OF HUBNET, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 134-144
Authors:
LAM KP
Citation: Kp. Lam, MICROPROCESSOR SYSTEMS DIAGNOSIS USING A TIME-RANGE APPROACH, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 1-9
Authors:
JONES KJ
Citation: Kj. Jones, PARALLEL DFT COMPUTATION ON BIT-SERIAL SYSTOLIC PROCESSOR ARRAYS, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 10-18
Authors:
GUDVANGEN S
HOLT AGJ
Citation: S. Gudvangen et Agj. Holt, PERFORMANCE MODELS FOR MESSAGE-PASSING ARCHITECTURES, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 19-32
Authors:
LI HF
ZHANG CN
JAYAKUMAR R
Citation: Hf. Li et al., SPACE-TIME MAPPING, LATENCY OF DATA-FLOW AND CONCURRENT ERROR-DETECTION IN SYSTOLIC ARRAYS, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 33-44
Authors:
SKAVANTZOS A
MITASH N
Citation: A. Skavantzos et N. Mitash, IMPLEMENTATION ISSUES OF 2-DIMENSIONAL POLYNOMIAL MULTIPLIERS FOR SIGNAL-PROCESSING USING RESIDUE ARITHMETIC, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 45-53
Authors:
WILSON GR
BATCHELOR BG
Citation: Gr. Wilson et Bg. Batchelor, MOMENTS OF A CRACK CODED BLOB, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 54-58
Authors:
TRAN A
LEE E
Citation: A. Tran et E. Lee, GENERALIZATION OF TRISTATE MAP AND A COMPOSITION METHOD FOR MINIMIZATION OF REED-MULLER POLYNOMIALS IN MIXED POLARITY, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 59-64
Authors:
TRAN A
WANG J
Citation: A. Tran et J. Wang, DECOMPOSITION METHOD FOR MINIMIZATION OF REED-MULLER POLYNOMIALS IN MIXED POLARITY, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 65-68
Authors:
CSANKY L
PERKOWSKI MA
SCHAFER I
Citation: L. Csanky et al., CANONICAL RESTRICTED MIXED-POLARITY EXCLUSIVE-OR SUMS OF PRODUCTS ANDTHE EFFICIENT ALGORITHM FOR THEIR MINIMIZATION, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 69-77
Authors:
GOTTFRIED NH
Citation: Nh. Gottfried, LOW-COMPLEXITY VITERBI DETECTOR FOR MAGNETIC DISC DRIVES, IEE proceedings. Part E. Computers and digital techniques, 140(1), 1993, pp. 78-80