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Results: 51-75/339
Authors:
Patnaik, LM
Gupta, S
Citation: Lm. Patnaik et S. Gupta, Exact output response computation of RC interconnects under general polynomial input waveforms, VLSI DESIGN, 11(2), 2000, pp. 75-84
Authors:
Falkowski, BJ
Stankovic, RS
Citation: Bj. Falkowski et Rs. Stankovic, Spectral interpretation and applications of decision diagrams, VLSI DESIGN, 11(2), 2000, pp. 85-105
Authors:
Wang, CC
Chien, YT
Chen, YP
Citation: Cc. Wang et al., A practical load-optimized VCO design for low-jitter 5V 500 MHz digital phase-locked loop, VLSI DESIGN, 11(2), 2000, pp. 107-113
Authors:
Hatirnaz, I
Gurkaynak, FK
Leblebici, Y
Citation: I. Hatirnaz et al., A modular and scalable architecture for the realization of high-speed programmable rank order filters using threshold logic, VLSI DESIGN, 11(2), 2000, pp. 115-128
Authors:
Rodriguez-Villegas, E
Avedillo, MJ
Quintana, JM
Huertas, G
Rueda, A
Citation: E. Rodriguez-villegas et al., nu MOS-based sorter for arithmetic applications, VLSI DESIGN, 11(2), 2000, pp. 129-136
Authors:
Zhang, YJ
Zheng, SQ
Citation: Yj. Zhang et Sq. Zheng, An efficient parallel VLSI sorting architecture, VLSI DESIGN, 11(2), 2000, pp. 137-147
Authors:
Chen, CIH
Zhou, YJ
Citation: Cih. Chen et Yj. Zhou, Configurable 2-D linear feedback shift registers for VLSI built-in self-test designs, VLSI DESIGN, 11(2), 2000, pp. 149-159
Authors:
Kim, DW
Choi, TY
Citation: Dw. Kim et Ty. Choi, Delay time estimation model for large digital CMOS circuits, VLSI DESIGN, 11(2), 2000, pp. 161-173
Authors:
Dmitriev, A
Saposhnikov, V
Saposhnikov, V
Goessel, M
Moshanin, V
Morosov, A
Citation: A. Dmitriev et al., New self-dual circuits for error detection and testing, VLSI DESIGN, 11(1), 2000, pp. 1-21
Authors:
Metra, C
Favalli, M
Ricco, B
Citation: C. Metra et al., Signal coding and CMOS gates for combinational functional blocks of very deep submicron self-checking circuits, VLSI DESIGN, 11(1), 2000, pp. 23-34
Authors:
Kavousianos, X
Nikolos, D
Sidiropoulos, G
Citation: X. Kavousianos et al., Novel single and double output TSC CMOS checkers for m-out-of-n codes, VLSI DESIGN, 11(1), 2000, pp. 35-45
Authors:
Matrosova, AY
Levin, I
Ostanin, SA
Citation: Ay. Matrosova et al., Self-checking synchronous FSM network design with low overhead, VLSI DESIGN, 11(1), 2000, pp. 47-58
Authors:
Simeu, E
Citation: E. Simeu, Optimal detector design for on-line testing of linear analog systems, VLSI DESIGN, 11(1), 2000, pp. 59-74
Authors:
Lala, PK
Citation: Pk. Lala, Special Issue: CMOS VLSI Circuits - Volume 11, Number 1 (2000), VLSI DESIGN, 11(1), 2000, pp. I-II
Authors:
Anile, AM
Muscato, O
Romano, V
Citation: Am. Anile et al., Moment equations with maximum entropy closure for carrier transport in semiconductor devices: Validation in bulk silicon, VLSI DESIGN, 10(4), 2000, pp. 335-354
Authors:
Batty, W
Panks, AJ
Johnson, RG
Snowden, CM
Citation: W. Batty et al., Electro-thermal modelling of monolithic and hybrid microwave and millimeter wave IC's, VLSI DESIGN, 10(4), 2000, pp. 355-389
Authors:
Carey, GF
Pardhanani, AL
Bova, SW
Citation: Gf. Carey et al., Advanced numerical methods and software approaches for semiconductor device simulation, VLSI DESIGN, 10(4), 2000, pp. 391-414
Authors:
Gardner, CL
Ringhofer, C
Citation: Cl. Gardner et C. Ringhofer, The Chapman-Enskog expansion and the quantum hydrodynamic model for semiconductor devices, VLSI DESIGN, 10(4), 2000, pp. 415-435
Authors:
Gross, WJ
Vasileska, D
Ferry, DK
Citation: Wj. Gross et al., 3D simulations of ultra-small MOSFETs with real-space treatment of the electron-electron and electron-ion interactions, VLSI DESIGN, 10(4), 2000, pp. 437
Authors:
Jerome, JW
Citation: Jw. Jerome, Analytical and computational advances for hydrodynamic models of classicaland quantum charge transport, VLSI DESIGN, 10(4), 2000, pp. 453-466
Authors:
Reggiani, S
Valdinoci, M
Colalongo, L
Rudan, M
Baccarani, G
Citation: S. Reggiani et al., An analytical, temperature-dependent model for majority- and minority-carrier mobility in silicon devices, VLSI DESIGN, 10(4), 2000, pp. 467-483
Authors:
Rose, DJ
Shao, H
Henriquez, CS
Citation: Dj. Rose et al., Discretization of anisotropic convection-diffusion equations, convective M-matrices and their iterative solution, VLSI DESIGN, 10(4), 2000, pp. 485-529
Authors:
Gardner, CL
Citation: Cl. Gardner, Special issue: Semiconductor device modeling and simulation, VLSI DESIGN, 10(4), 2000, pp. I-I
Authors:
Luo, Z
Martonosi, M
Ashar, P
Citation: Z. Luo et al., An edge-endpoint-based configurable hardware architecture for VLSI layout Design Rule Checking, VLSI DESIGN, 10(3), 2000, pp. 249-263
Authors:
Schott, B
Crago, SP
Parker, RH
Chen, CH
Carter, LC
Czarnaski, JP
French, M
Hom, I
Tho, T
Valenti, T
Citation: B. Schott et al., Reconfigurable architectures for system level applications of adaptive computing, VLSI DESIGN, 10(3), 2000, pp. 265-279