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Authors: ACOSTA AJ JIMENEZ R BARRIGA A BELLIDO MJ VALENCIA M HUERTAS JL
Citation: Aj. Acosta et al., DESIGN AND CHARACTERIZATION OF A CMOS VLSI SELF-TIMED MULTIPLIER ARCHITECTURE BASED ON A BIT-LEVEL PIPELINED-ARRAY STRUCTURE, IEE proceedings. Circuits, devices and systems, 145(4), 1998, pp. 247-253

Authors: BATURONE I SANCHEZSOLANO S HUERTAS JL
Citation: I. Baturone et al., TOWARDS THE IC IMPLEMENTATION OF ADAPTIVE FUZZY-SYSTEMS, IEICE transactions on fundamentals of electronics, communications and computer science, E81A(9), 1998, pp. 1877-1885

Authors: VAZQUEZ D RUEDA A HUERTAS JL PERALIAS E
Citation: D. Vazquez et al., A HIGH-Q BANDPASS FULLY DIFFERENTIAL SC FILTER WITH ENHANCED TESTABILITY, IEEE journal of solid-state circuits, 33(7), 1998, pp. 976-986

Authors: BATURONE I BARRIGA A SANCHEZSOLANO S HUERTAS JL
Citation: I. Baturone et al., MIXED-SIGNAL DESIGN OF A FULLY PARALLEL FUZZY PROCESSOR, Electronics Letters, 34(5), 1998, pp. 437-438

Authors: BATURONE I SANCHEZSOLANO S BARRIGA A HUERTAS JL
Citation: I. Baturone et al., IMPLEMENTATION OF CMOS FUZZY CONTROLLERS AS MIXED-SIGNAL INTEGRATED-CIRCUITS, IEEE transactions on fuzzy systems, 5(1), 1997, pp. 1-19

Authors: JUANCHICO J BELLIDO MJ ACOSTA AJ VALENCIA M HUERTAS JL
Citation: J. Juanchico et al., ANALYSIS OF METASTABLE OPERATION IN A CMOS DYNAMIC D-LATCH, Analog integrated circuits and signal processing, 14(1-2), 1997, pp. 143-157

Authors: HUERTAS JL CHEN WK MADAN RN
Citation: Jl. Huertas et al., VISIONS OF NONLINEAR MECHANICS IN THE 21ST-CENTURY, Journal of the Franklin Institute, 334B(5-6), 1997, pp. 5-6

Authors: BATURONE I SANCHEZSOLANO S HUERTAS JL
Citation: I. Baturone et al., SELF-CHECKING CURRENT-MODE ANALOG MEMORY, Electronics Letters, 33(16), 1997, pp. 1349-1350

Authors: HUERTAS JL SANCHEZSOLANO S BATURONE I BARRIGA A
Citation: Jl. Huertas et al., INTEGRATED-CIRCUIT IMPLEMENTATION OF FUZZY CONTROLLERS, IEEE journal of solid-state circuits, 31(7), 1996, pp. 1051-1058

Authors: AVEDILLO MJ QUINTANA JM HUERTAS JL
Citation: Mj. Avedillo et al., CONSTRAINED STATE ASSIGNMENT OF EASILY TESTABLE FSMS, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 6(1), 1995, pp. 133-138

Authors: VALENCIA M BELLIDO MJ HUERTAS JL ACOSTA AJ SANCHEZSOLANO S
Citation: M. Valencia et al., MODULAR ASYNCHRONOUS ARBITER INSENSITIVE TO METASTABILITY, I.E.E.E. transactions on computers, 44(12), 1995, pp. 1456-1461

Authors: MEDEIRO F PEREZVERDU B RODRIGUEZVAZQUEZ A HUERTAS JL
Citation: F. Medeiro et al., A VERTICALLY INTEGRATED TOOL FOR AUTOMATED DESIGN OF SIGMA-DELTA MODULATORS, IEEE journal of solid-state circuits, 30(7), 1995, pp. 762-772

Authors: ACOSTA AJ VALENCIA M BARRIGA A BELLIDO MJ HUERTAS JL
Citation: Aj. Acosta et al., SODS - A NEW CMOS DIFFERENTIAL-TYPE STRUCTURE, IEEE journal of solid-state circuits, 30(7), 1995, pp. 835-838

Authors: VAZQUEZ D RUEDA A HUERTAS JL RICHARDSON AMD
Citation: D. Vazquez et al., PRACTICAL DFT STRATEGY FOR FAULT-DIAGNOSIS IN ACTIVE ANALOG FILTERS, Electronics Letters, 31(15), 1995, pp. 1221-1222

Authors: BATURONE I HUERTAS JL BARRIGA A SANCHEZSOLANO S
Citation: I. Baturone et al., EXTENDING THE FUNCTIONALITY OF A FLEXIBLE CURRENT-MODE CMOS CIRCUIT, Electronics Letters, 31(15), 1995, pp. 1231-1232

Authors: AVEDILLO MJ QUINTANA JM HUERTAS JL
Citation: Mj. Avedillo et al., FSMTEST - SYNTHESIS FOR TESTABILITY AND TEST-GENERATION OF PLA-BASED FSM, IEE proceedings. Computers and digital techniques, 141(4), 1994, pp. 221-228

Authors: AVEDILLO MJ QUINTANA JM HUERTAS JL
Citation: Mj. Avedillo et al., STATE MERGING AND STATE SPLITTING VIA STATE ASSIGNMENT - A NEW FSM SYNTHESIS ALGORITHM, IEE proceedings. Computers and digital techniques, 141(4), 1994, pp. 229-237

Authors: MEDEIRO F RODRIGUEZMACIAS R FERNANDEZ FV DOMINGUEZCASTRO R HUERTAS JL RODRIGUEZVAZQUEZ A
Citation: F. Medeiro et al., GLOBAL DESIGN OF ANALOG CELLS USING STATISTICAL OPTIMIZATION TECHNIQUES, Analog integrated circuits and signal processing, 6(3), 1994, pp. 179-195

Authors: MEDEIRO F RODRIGUEZMACIAS R FERNANDEZ FV DOMINGUEZCASTRO R HUERTAS JL RODRIGUEZVAZQUEZ A
Citation: F. Medeiro et al., GLOBAL DESIGN OF ANALOG CELLS USING STATISTICAL OPTIMIZATION TECHNIQUES, Analog integrated circuits and signal processing, 6(3), 1994, pp. 179-195

Authors: HUERTAS JL HORNINGER K
Citation: Jl. Huertas et K. Horninger, SPECIAL ISSUE ON THE 1993 EUROPEAN SOLID-STATE CIRCUITS CONFERENCE - FOREWORD, IEEE journal of solid-state circuits, 29(8), 1994, pp. 855-856

Authors: ESPEJO S RODRIGUEZVAZQUEZ A DOMINGUEZCASTRO R HUERTAS JL SANCHEZSINENCIO E
Citation: S. Espejo et al., SMART-PIXEL CELLULAR NEURAL NETWORKS IN ANALOG CURRENT-MODE CMOS TECHNOLOGY, IEEE journal of solid-state circuits, 29(8), 1994, pp. 895-905

Authors: YUFERA A RUEDA A HUERTAS JL
Citation: A. Yufera et al., PROGRAMMABLE SWITCHED-CURRENT WAVE ANALOG FILTERS, IEEE journal of solid-state circuits, 29(8), 1994, pp. 927-935

Authors: BATURONE I HUERTAS JL BARRIGA A SANCHEZSOLANO S
Citation: I. Baturone et al., CURRENT-MODE MULTIPLE-INPUT MAX CIRCUIT, Electronics Letters, 30(9), 1994, pp. 678-680

Authors: RODRIGUEZVAZQUEZ A ESPEJO S DOMINGUEZCASTRO R HUERTAS JL SANCHEZSINENCIO E
Citation: A. Rodriguezvazquez et al., CURRENT-MODE TECHNIQUES FOR THE IMPLEMENTATION OF CONTINUOUS-TIME ANDDISCRETE-TIME CELLULAR NEURAL NETWORKS, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 40(3), 1993, pp. 132-146

Authors: LINARESBARRANCO B SANCHEZSINENCIO E RODRIGUEZVAZQUEZ A HUERTAS JL
Citation: B. Linaresbarranco et al., A CMOS ANALOG ADAPTIVE BAM WITH ON-CHIP LEARNING AND WEIGHT REFRESHING, IEEE transactions on neural networks, 4(3), 1993, pp. 445-455
Risultati: 1-25 | 26-29