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Results: 1-10 |
Results: 10
A Body-Effect-assisted NOR-type (BeNOR) multilevel flash memory
Authors: Wang, YS Tsai, HP Yang, ECS King, YC Chen, S Hsu, CCH
Citation: Ys. Wang et al., A Body-Effect-assisted NOR-type (BeNOR) multilevel flash memory, JPN J A P 1, 40(4B), 2001, pp. 2954-2957
New trap-assisted band-to-band tunneling induced gate current model for p-channel metal-oxide-semiconductor field effect transistors with sub-3 nm oxides
Authors: Lee, HM Liu, CJ Hsu, CW Liang, MS King, YC Hsu, CCH
Citation: Hm. Lee et al., New trap-assisted band-to-band tunneling induced gate current model for p-channel metal-oxide-semiconductor field effect transistors with sub-3 nm oxides, JPN J A P 1, 40(3A), 2001, pp. 1218-1221
Comprehensive study on a novel bidirectional tunneling program/erase NOR-type (BiNOR) 3-D flash memory cell
Authors: Chou, AHF Yang, ECS Liu, CJ Pong, HH Liaw, MC Chao, TS King, YC Hwang, HL Hsu, CCH
Citation: Ahf. Chou et al., Comprehensive study on a novel bidirectional tunneling program/erase NOR-type (BiNOR) 3-D flash memory cell, IEEE DEVICE, 48(7), 2001, pp. 1386-1393
Optimization of sub-5-nm multiple-thickness gate oxide formed by oxygen implantation
Authors: King, YC Kuo, C King, TJ Hu, CM
Citation: Yc. King et al., Optimization of sub-5-nm multiple-thickness gate oxide formed by oxygen implantation, IEEE DEVICE, 48(6), 2001, pp. 1279-1281
Charge-trap memory device fabricated by oxidation of Si1-xGex
Authors: King, YC King, TJ Hu, CM
Citation: Yc. King et al., Charge-trap memory device fabricated by oxidation of Si1-xGex, IEEE DEVICE, 48(4), 2001, pp. 696-700
A new bit-line-controlled self-convergent multilevel AND-type flash memory
Authors: Chou, AHF Yang, ECS Wong, WZ King, YC Hsu, CCH
Citation: Ahf. Chou et al., A new bit-line-controlled self-convergent multilevel AND-type flash memory, JPN J A P 1, 39(4B), 2000, pp. 2215-2218
Comprehensive study of a new self-convergent programming scheme for split gate flash memory
Authors: Chou, AHF Wong, WZ Yang, ECS Yao, YY Wang, YS King, YC Hsu, CCH
Citation: Ahf. Chou et al., Comprehensive study of a new self-convergent programming scheme for split gate flash memory, JPN J A P 1, 39(4B), 2000, pp. 2219-2222
Novel source-controlled self-verified programming for multilevel EEPROM's
Authors: Lin, FRL Lin, SY Lee, ML Boe, CH Yeh, CP Wu, PH Ni, J King, YC Hsu, CCH
Citation: Frl. Lin et al., Novel source-controlled self-verified programming for multilevel EEPROM's, IEEE DEVICE, 47(6), 2000, pp. 1166-1174
A long-refresh dynamic/quasi-nonvolatile memory device with 2-nm tunnelingoxide
Authors: King, YC King, TJ Hu, CM
Citation: Yc. King et al., A long-refresh dynamic/quasi-nonvolatile memory device with 2-nm tunnelingoxide, IEEE ELEC D, 20(8), 1999, pp. 409-411
Observation of reduced poly-gate depletion effect for poly-Si0.8Ge0.2-gated NMOS devices
Authors: Lee, WC King, YC King, TJ Hu, CM
Citation: Wc. Lee et al., Observation of reduced poly-gate depletion effect for poly-Si0.8Ge0.2-gated NMOS devices, EL SOLID ST, 1(1), 1998, pp. 58-59
Risultati: 1-10 |