Citation: I. Pomeranz et Sm. Reddy, ON DICTIONARY-BASED FAULT LOCATION IN DIGITAL LOGIC-CIRCUITS, I.E.E.E. transactions on computers, 46(1), 1997, pp. 48-59
Citation: Cs. Pickles et al., DETERMINATION OF HIGH-SPATIAL-RESOLUTION ARGON ISOTOPE VARIATIONS IN METAMORPHIC BIOTITES, Geochimica et cosmochimica acta, 61(18), 1997, pp. 3809-3833
Citation: Sm. Reddy et al., A MICROSTRUCTURAL AND ARGON LASERPROBE STUDY OF SHEAR ZONE DEVELOPMENT AT THE WESTERN MARGIN OF THE NANGA PARBAT-HARAMOSH MASSIF, WESTERN HIMALAYA, Contributions to Mineralogy and Petrology, 128(1), 1997, pp. 16-29
Citation: M. Kyrolainen et al., BLOOD COMPATIBILITY AND EXTENDED LINEARITY OF LACTATE ENZYME ELECTRODE USING POLY(VINYL CHLORIDE) OUTER MEMBRANES, Analytica chimica acta, 353(2-3), 1997, pp. 281-289
Citation: Sm. Reddy et Pm. Vadgama, A STUDY OF THE PERMEABILITY PROPERTIES OF SURFACTANT MODIFIED POLY(VINYL CHLORIDE) MEMBRANES, Analytica chimica acta, 350(1-2), 1997, pp. 67-76
Citation: Sm. Reddy et Pm. Vadgama, SURFACTANT-MODIFIED POLY(VINYL CHLORIDE) MEMBRANES AS BIOCOMPATIBLE INTERFACES FOR AMPEROMETRIC ENZYME ELECTRODES, Analytica chimica acta, 350(1-2), 1997, pp. 77-89
Citation: U. Sparmann et Sm. Reddy, ON THE EFFECTIVENESS OF RESIDUE CODE CHECKING FOR PARALLEL TWOS COMPLEMENT MULTIPLIERS, IEEE transactions on very large scale integration (VLSI) systems, 4(2), 1996, pp. 227-239
Citation: W. Kunz et al., A NOVEL FRAMEWORK FOR LOGIC VERIFICATION IN A SYNTHESIS ENVIRONMENT, IEEE transactions on computer-aided design of integrated circuits and systems, 15(1), 1996, pp. 20-32
Citation: Sm. Reddy et al., A AR-40 AR-39 LASER PROBE STUDY OF MICAS FROM THE SESIA ZONE, ITALIANALPS - IMPLICATIONS FOR METAMORPHIC AND DEFORMATION HISTORIES/, Journal of metamorphic geology, 14(4), 1996, pp. 493-508
Citation: I. Pomeranz et Sm. Reddy, ON REMOVING REDUNDANCIES FROM SYNCHRONOUS SEQUENTIAL-CIRCUITS WITH SYNCHRONIZING SEQUENCES, I.E.E.E. transactions on computers, 45(1), 1996, pp. 20-32
Citation: I. Pomeranz et Sm. Reddy, ON THE NUMBER OF TESTS TO DETECT ALL PATH DELAY FAULTS IN COMBINATIONAL LOGIC-CIRCUITS, I.E.E.E. transactions on computers, 45(1), 1996, pp. 50-62
Citation: Y. Shrivastava et al., NONPOSITIVE HOPFIELD NETWORKS FOR UNIDIRECTIONAL ERROR-CORRECTING CODING, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 42(6), 1995, pp. 293-306
Citation: Ak. Pramanick et Sm. Reddy, EFFICIENT MULTIPLE PATH PROPAGATING TESTS FOR DELAY FAULTS, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 7(3), 1995, pp. 157-172
Citation: I. Pomeranz et Sm. Reddy, ON CORRECTION OF MULTIPLE DESIGN ERRORS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(2), 1995, pp. 255-264
Authors:
KAJIHARA S
POMERANZ I
KINOSHITA K
REDDY SM
Citation: S. Kajihara et al., COST-EFFECTIVE GENERATION OF MINIMAL TEST SETS FOR STUCK-AT FAULTS INCOMBINATIONAL LOGIC-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(12), 1995, pp. 1496-1504
Citation: I. Pomeranz et al., NEST - A NONENUMERATIVE TEST-GENERATION METHOD FOR PATH DELAY FAULTS IN COMBINATIONAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(12), 1995, pp. 1505-1515
Citation: I. Pomeranz et Sm. Reddy, INCREDYBLE - A NEW SEARCH STRATEGY FOR DESIGN AUTOMATION PROBLEMS WITH APPLICATIONS TO TESTING, I.E.E.E. transactions on computers, 44(6), 1995, pp. 792-804
Citation: I. Pomeranz et Sm. Reddy, ALIASING COMPUTATION USING FAULT SIMULATION WITH FAULT DROPPING, I.E.E.E. transactions on computers, 44(1), 1995, pp. 139-144
Authors:
SHAHOOKAR K
KHAMISANI W
MAZUMDER P
REDDY SM
Citation: K. Shahookar et al., GENETIC BEAM SEARCH FOR GATE MATRIX LAYOUT, IEE proceedings. Computers and digital techniques, 141(2), 1994, pp. 123-128
Citation: Ja. Massey et al., CORRELATION BETWEEN MELTING, DEFORMATION AND FLUID INTERACTION IN THECONTINENTAL-CRUST OF THE HIGH HIMALAYAS, LANGTANG VALLEY, NEPAL, Terra nova, 6(3), 1994, pp. 229-237
Citation: I. Pomeranz et Sm. Reddy, ON ACHIEVING COMPLETE FAULT COVERAGE FOR SEQUENTIAL-MACHINES, IEEE transactions on computer-aided design of integrated circuits and systems, 13(3), 1994, pp. 378-386
Citation: I. Pomeranz et Sm. Reddy, AN EFFICIENT NONENUMERATIVE METHOD TO ESTIMATE THE PATH DELAY-FAULT COVERAGE IN COMBINATIONAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(2), 1994, pp. 240-250