Authors:
Renovell, M
Azais, F
Bodin, JC
Bertrand, Y
Citation: M. Renovell et al., Combining functional and structural approaches for switched-current circuit testing, J ELEC TEST, 16(3), 2000, pp. 259-267
Authors:
Renovell, M
Portal, JM
Figueras, J
Zorian, Y
Citation: M. Renovell et al., An approach to minimize the test configuration for the logic cells of the Xilinx XC4000 FPGAs family, J ELEC TEST, 16(3), 2000, pp. 289-299