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Results: 1-10 |
Results: 10
SI-ULSI WITH A SCALED-DOWN FUTURE
Authors: VASUDEV PK ZEITZOFF PM
Citation: Pk. Vasudev et Pm. Zeitzoff, SI-ULSI WITH A SCALED-DOWN FUTURE, IEEE circuits and devices magazine, 14(2), 1998, pp. 19-29
STRIP-PLOT DESIGN FOR 2-STEP PROCESSES
Authors: MILLIKEN GA SHI XY MENDICINO M VASUDEV PK
Citation: Ga. Milliken et al., STRIP-PLOT DESIGN FOR 2-STEP PROCESSES, Quality and reliability engineering international, 14(4), 1998, pp. 197-210
INTERFACIAL MICROSTRUCTURE AND REACTION AT THE SPIN-COATED FLUORINATED POLYIMIDE AL INTERFACE - SURFACE-ENHANCED X-RAY-DIFFRACTION AND TEM STUDIES/
Authors: TONG JY SHI FG ZHAO B WANG SQ BRONGO M VASUDEV PK
Citation: Jy. Tong et al., INTERFACIAL MICROSTRUCTURE AND REACTION AT THE SPIN-COATED FLUORINATED POLYIMIDE AL INTERFACE - SURFACE-ENHANCED X-RAY-DIFFRACTION AND TEM STUDIES/, Applied physics A: Materials science & processing, 65(3), 1997, pp. 287-290
A NOVEL SUBHALF MICRON AL-CU VIA PLUG INTERCONNECT USING LOW DIELECTRIC-CONSTANT MATERIAL AS INTER-LEVEL DIELECTRIC
Authors: ZHAO B BIBERGER MA HOFFMAN V WANG SQ VASUDEV PK SEIDEL TE
Citation: B. Zhao et al., A NOVEL SUBHALF MICRON AL-CU VIA PLUG INTERCONNECT USING LOW DIELECTRIC-CONSTANT MATERIAL AS INTER-LEVEL DIELECTRIC, IEEE electron device letters, 18(2), 1997, pp. 57-59
LOW-TEMPERATURE AND LOW-COST PLANARISED ALUMINUM INTERCONNECT FOR SUBHALF MICROMETER VLSI CIRCUITS
Authors: ZHAO B BIBERGER MA HOFFMAN V WANG SQ VASUDEV PK SEIDEL TE
Citation: B. Zhao et al., LOW-TEMPERATURE AND LOW-COST PLANARISED ALUMINUM INTERCONNECT FOR SUBHALF MICROMETER VLSI CIRCUITS, Electronics Letters, 33(3), 1997, pp. 247-248
SELECTIVE AND BLANKET ELECTROLESS COPPER DEPOSITION FOR ULTRALARGE SCALE INTEGRATION
Authors: DUBIN VM SHACHAMDIAMAND Y ZHAO B VASUDEV PK TING CH
Citation: Vm. Dubin et al., SELECTIVE AND BLANKET ELECTROLESS COPPER DEPOSITION FOR ULTRALARGE SCALE INTEGRATION, Journal of the Electrochemical Society, 144(3), 1997, pp. 898-908
CHARGE-TO-BREAKDOWN CHARACTERISTICS OF THIN GATE OXIDE AND BURIED OXIDE ON SIMOX SOI WAFERS
Authors: SEO JH WOO JC MENDICINO M VASUDEV PK
Citation: Jh. Seo et al., CHARGE-TO-BREAKDOWN CHARACTERISTICS OF THIN GATE OXIDE AND BURIED OXIDE ON SIMOX SOI WAFERS, Journal of the Electrochemical Society, 144(1), 1997, pp. 375-378
CMOS DEVICE AND INTERCONNECT TECHNOLOGY ENHANCEMENTS FOR LOW-POWER LOW-VOLTAGE APPLICATIONS
Authors: VASUDEV PK
Citation: Pk. Vasudev, CMOS DEVICE AND INTERCONNECT TECHNOLOGY ENHANCEMENTS FOR LOW-POWER LOW-VOLTAGE APPLICATIONS, Solid-state electronics, 39(4), 1996, pp. 481-488
ADVANCED MATERIALS FOR LOW-POWER ELECTRONICS
Authors: VASUDEV PK MENDICINO M SEIDEL TE
Citation: Pk. Vasudev et al., ADVANCED MATERIALS FOR LOW-POWER ELECTRONICS, Solid-state electronics, 39(4), 1996, pp. 489-497
SILICON-ON-INSULATOR MATERIAL QUALIFICATION FOR LOW-POWER COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR APPLICATION
Authors: MENDICINO MA VASUDEV PK MAILLOT P HOENER C BAYLIS J BENNETT J BODEN T JACKETT S HUFFMAN K GODWIN M
Citation: Ma. Mendicino et al., SILICON-ON-INSULATOR MATERIAL QUALIFICATION FOR LOW-POWER COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR APPLICATION, Thin solid films, 270(1-2), 1995, pp. 578-583
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