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Results:
1-10
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Results: 10
Authors:
Wey, CL
Citation: Cl. Wey, Design of fast high-radix SRT dividers and their VLSI implementation, IEE P-COM D, 147(4), 2000, pp. 275-281
Authors:
Wang, CP
Wey, CL
Citation: Cp. Wang et Cl. Wey, Design and analysis of built-in testers for CMOS switched-current circuits, ANALOG IN C, 23(3), 2000, pp. 179-188
Authors:
Huang, RY
Wang, JS
Wey, CL
Citation: Ry. Huang et al., A fully differential current copier for performance improvement, INT J CIRCU, 28(2), 2000, pp. 101-108
Authors:
Wan, Y
Khalil, MA
Wey, CL
Citation: Y. Wan et al., Efficient conversion algorithms for long-word-length binary logarithmic numbers and logic implementation, IEE P-COM D, 146(6), 1999, pp. 295-301
Authors:
Wey, CL
Wang, CP
Citation: Cl. Wey et Cp. Wang, Design of a fast radix-4 SRT divider and its VLSI implementation, IEE P-COM D, 146(4), 1999, pp. 205-210
Authors:
Wan, Y
Wey, CL
Citation: Y. Wan et Cl. Wey, Efficient algorithms for binary logarithmic conversion and addition, IEE P-COM D, 146(3), 1999, pp. 168-172
Authors:
Wang, JS
Wey, CL
Citation: Js. Wang et Cl. Wey, A 12-bit 100-ns/bit 1.9-mW CMOS switched-current cyclic A D converter, IEEE CIR-II, 46(5), 1999, pp. 507-516
Authors:
Wang, JS
Wey, CL
Citation: Js. Wang et Cl. Wey, Design and analysis of high performance current reference generators for low-power CMOS data converters, IEEE CIR-II, 46(5), 1999, pp. 647-652
Authors:
Wey, CL
Huang, WH
Citation: Cl. Wey et Wh. Huang, Redesignability check for analog circuits with incomplete implementation information, IEEE CIRC-I, 46(8), 1999, pp. 939-949
Authors:
Huang, WH
Wey, CL
Citation: Wh. Huang et Cl. Wey, ATPRG: An automatic test program generator using HDL-A for fault diagnosisof analog/mixed-signal integrated circuits, IEEE INSTR, 47(2), 1998, pp. 426-431
Risultati:
1-10
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