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Results: 1-12 |
Results: 12
Hot hole gate current in surface channel PMOSFETs
Authors: Driussi, F Esseni, D Selmi, L Piazza, F
Citation: F. Driussi et al., Hot hole gate current in surface channel PMOSFETs, IEEE ELEC D, 22(1), 2001, pp. 29-31
Experimental study of low voltage anode hole injection in thin oxides
Authors: Esseni, D Bude, JD Selmi, L
Citation: D. Esseni et al., Experimental study of low voltage anode hole injection in thin oxides, MICROEL ENG, 59(1-4), 2001, pp. 55-60
BipFLASH: A novel non-volatile memory cell concept for high-speed, low-power applications
Authors: Esseni, D Selmi, L
Citation: D. Esseni et L. Selmi, BipFLASH: A novel non-volatile memory cell concept for high-speed, low-power applications, MICROEL ENG, 59(1-4), 2001, pp. 231-236
Measurements of low field mobility in ultra-thin SOI n- and p-MOSFETs
Authors: Mastrapasqua, M Esseni, D Celler, GK Fiegna, C Selmi, L Sangiorgi, E
Citation: M. Mastrapasqua et al., Measurements of low field mobility in ultra-thin SOI n- and p-MOSFETs, MICROEL ENG, 59(1-4), 2001, pp. 409-416
Optimized programming of multilevel flash EEPROMs
Authors: Versari, R Esseni, D Falavigna, G Lanzoni, M Ricco, B
Citation: R. Versari et al., Optimized programming of multilevel flash EEPROMs, IEEE DEVICE, 48(8), 2001, pp. 1641-1646
Bandwidth optimization of flash memories with the RGP technique
Authors: Versari, R Esseni, D Falavigna, G Lanzoni, M Ricco, B
Citation: R. Versari et al., Bandwidth optimization of flash memories with the RGP technique, IEEE DEVICE, 48(8), 2001, pp. 1737-1740
On the origin of the dispersion of erased threshold voltages in flash EEPROM memory cells
Authors: Esseni, D Ricco, B
Citation: D. Esseni et B. Ricco, On the origin of the dispersion of erased threshold voltages in flash EEPROM memory cells, IEEE DEVICE, 47(5), 2000, pp. 1120-1123
Trading-off programming speed and current absorption in flash memories with the ramped-gate programming technique
Authors: Esseni, D Villa, C Tassan, S Ricco, B
Citation: D. Esseni et al., Trading-off programming speed and current absorption in flash memories with the ramped-gate programming technique, IEEE DEVICE, 47(4), 2000, pp. 828-834
Injection efficiency of CHISEL gate currents in short MOS devices: Physical mechanisms, device implications, and sensitivity to technological parameters
Authors: Esseni, D Selmi, L Ghetti, A Sangiorgi, E
Citation: D. Esseni et al., Injection efficiency of CHISEL gate currents in short MOS devices: Physical mechanisms, device implications, and sensitivity to technological parameters, IEEE DEVICE, 47(11), 2000, pp. 2194-2200
A better understanding of substrate enhanced gate current in VLSI MOSFET'sand flash cells - Part I: Phenomenological aspects
Authors: Esseni, D Selmi, L
Citation: D. Esseni et L. Selmi, A better understanding of substrate enhanced gate current in VLSI MOSFET'sand flash cells - Part I: Phenomenological aspects, IEEE DEVICE, 46(2), 1999, pp. 369-375
A better understanding of substrate enhanced gate current in VLSI MOSFET'sand flash cells - Part II: Physical analysis
Authors: Selmi, L Esseni, D
Citation: L. Selmi et D. Esseni, A better understanding of substrate enhanced gate current in VLSI MOSFET'sand flash cells - Part II: Physical analysis, IEEE DEVICE, 46(2), 1999, pp. 376-382
A new and flexible scheme for hot-electron programming of nonvolatile memory cells
Authors: Esseni, D Della Strada, A Cappelletti, P Ricco, B
Citation: D. Esseni et al., A new and flexible scheme for hot-electron programming of nonvolatile memory cells, IEEE DEVICE, 46(1), 1999, pp. 125-133
Risultati: 1-12 |