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Results: 1-25 |
Results: 25
SELECTIVE EPITAXIAL-GROWTH SI RESONANT-CAVITY PHOTODETECTOR
Authors: NEUDECK GW DENTON J QI J SCHAUB JD LI R CAMPBELL JC
Citation: Gw. Neudeck et al., SELECTIVE EPITAXIAL-GROWTH SI RESONANT-CAVITY PHOTODETECTOR, IEEE photonics technology letters, 10(1), 1998, pp. 129-131
EXPRESSION FOR THE GROWTH-RATE OF SELECTIVE EPITAXIAL-GROWTH OF SILICON USING DICHLOROSILANE, HYDROGEN-CHLORIDE, AND HYDROGEN IN A LOW-PRESSURE CHEMICAL-VAPOR-DEPOSITION PANCAKE REACTOR
Authors: KONGETIRA P NEUDECK GW TAKOUDIS CG
Citation: P. Kongetira et al., EXPRESSION FOR THE GROWTH-RATE OF SELECTIVE EPITAXIAL-GROWTH OF SILICON USING DICHLOROSILANE, HYDROGEN-CHLORIDE, AND HYDROGEN IN A LOW-PRESSURE CHEMICAL-VAPOR-DEPOSITION PANCAKE REACTOR, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 15(6), 1997, pp. 1902-1907
SELECTIVE EPITAXIAL-GROWTH OF SI1-XGEX SI STRAINED-LAYERS IN A TUBULAR HOT-WALL LOW-PRESSURE CHEMICAL-VAPOR-DEPOSITION SYSTEM/
Authors: WANG WC DENTON JP NEUDECK GW LEE IM TAKOUDIS CG KOH MTK KVAM EP
Citation: Wc. Wang et al., SELECTIVE EPITAXIAL-GROWTH OF SI1-XGEX SI STRAINED-LAYERS IN A TUBULAR HOT-WALL LOW-PRESSURE CHEMICAL-VAPOR-DEPOSITION SYSTEM/, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 15(1), 1997, pp. 138-141
STACKING-FAULT REDUCTION IN SILICON-ON-INSULATOR (SOI) ISLANDS PRODUCED BY SELECTIVE EPITAXIAL-GROWTH (SEG) OF SILICON USING A THERMALLY NITRIDED SIO2 FIELD INSULATOR
Authors: NEUDECK GW MERRITT KD DENTON JP
Citation: Gw. Neudeck et al., STACKING-FAULT REDUCTION IN SILICON-ON-INSULATOR (SOI) ISLANDS PRODUCED BY SELECTIVE EPITAXIAL-GROWTH (SEG) OF SILICON USING A THERMALLY NITRIDED SIO2 FIELD INSULATOR, Microelectronic engineering, 36(1-4), 1997, pp. 391-394
PROCESS IMPROVEMENTS IN THE SELECTIVE EPITAXIAL-GROWTH OF SI1-XGEX SISTRAINED LAYERS IN A CONVENTIONAL HOT-WALL LPCVD SYSTEM/
Authors: LEE IM TAKOUDIS CG WANG WC DENTON JP NEUDECK GW KOH MTK KVAM EP
Citation: Im. Lee et al., PROCESS IMPROVEMENTS IN THE SELECTIVE EPITAXIAL-GROWTH OF SI1-XGEX SISTRAINED LAYERS IN A CONVENTIONAL HOT-WALL LPCVD SYSTEM/, Journal of the Electrochemical Society, 144(3), 1997, pp. 1095-1099
AMMONIA NITRIDATION OF THERMAL POLYOXIDE TO ELIMINATE EPITAXIAL AMBIENT INDUCED DIELECTRIC PINHOLE FORMATION
Authors: FULTZ WW NEUDECK GW
Citation: Ww. Fultz et Gw. Neudeck, AMMONIA NITRIDATION OF THERMAL POLYOXIDE TO ELIMINATE EPITAXIAL AMBIENT INDUCED DIELECTRIC PINHOLE FORMATION, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 14(6), 1996, pp. 3465-3469
BURIED-GATE OXIDE THINNING DURING EPITAXIAL LATERAL OVERGROWTH FOR DUAL-GATED METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS
Authors: WATTS JS NEUDECK GW
Citation: Js. Watts et Gw. Neudeck, BURIED-GATE OXIDE THINNING DURING EPITAXIAL LATERAL OVERGROWTH FOR DUAL-GATED METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 14(3), 1996, pp. 1670-1674
A BRIDGE-TYPE PIEZORESISTIVE ACCELEROMETER USING MERGED EPITAXIAL LATERAL OVERGROWTH FOR THIN SILICON BEAM FORMATION
Authors: PAK JJ KABIR AE NEUDECK GW LOGSDON JH
Citation: Jj. Pak et al., A BRIDGE-TYPE PIEZORESISTIVE ACCELEROMETER USING MERGED EPITAXIAL LATERAL OVERGROWTH FOR THIN SILICON BEAM FORMATION, Sensors and actuators. A, Physical, 56(3), 1996, pp. 267-271
ELIMINATION OF THE SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH (SEG) OF SILICON FOR A DIELECTRIC ISOLATION TECHNOLOGY
Authors: SHERMAN JM NEUDECK GW DENTON JP BASHIR R FULTZ WW
Citation: Jm. Sherman et al., ELIMINATION OF THE SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH (SEG) OF SILICON FOR A DIELECTRIC ISOLATION TECHNOLOGY, IEEE electron device letters, 17(6), 1996, pp. 267-269
FULLY DEPLETED DUAL-GATED THIN-FILM SOI P-MOSFETS FABRICATED IN SOI ISLANDS WITH AN ISOLATED BURIED POLYSILICON BACKGATE
Authors: DENTON JP NEUDECK GW
Citation: Jp. Denton et Gw. Neudeck, FULLY DEPLETED DUAL-GATED THIN-FILM SOI P-MOSFETS FABRICATED IN SOI ISLANDS WITH AN ISOLATED BURIED POLYSILICON BACKGATE, IEEE electron device letters, 17(11), 1996, pp. 509-511
PROCESS-PROPERTY RELATIONSHIPS BETWEEN SILICON SELECTIVE EPITAXIAL-GROWTH AMBIENTS AND DEGRADATION OF INSULATORS
Authors: GAYNOR W TAKOUDIS CG NEUDECK GW
Citation: W. Gaynor et al., PROCESS-PROPERTY RELATIONSHIPS BETWEEN SILICON SELECTIVE EPITAXIAL-GROWTH AMBIENTS AND DEGRADATION OF INSULATORS, Journal of vacuum science & technology. A. Vacuum, surfaces, and films, 14(6), 1996, pp. 3224-3227
KINETICS AND MODELING OF LOW-PRESSURE CHEMICAL-VAPOR-DEPOSITION OF SI1-XGEX EPITAXIAL THIN-FILMS
Authors: LEE IM WANG WC NEUDECK GW TAKOUDIS CG
Citation: Im. Lee et al., KINETICS AND MODELING OF LOW-PRESSURE CHEMICAL-VAPOR-DEPOSITION OF SI1-XGEX EPITAXIAL THIN-FILMS, Chemical Engineering Science, 51(11), 1996, pp. 2681-2686
PRECISION CRYSTAL CORNER CUBE ARRAYS FOR OPTICAL GRATINGS FORMED BY (100)SILICON PLANES WITH SELECTIVE EPITAXIAL-GROWTH
Authors: NEUDECK GW SPITZ J CHANG JCH DENTON JP GALLAGHER N
Citation: Gw. Neudeck et al., PRECISION CRYSTAL CORNER CUBE ARRAYS FOR OPTICAL GRATINGS FORMED BY (100)SILICON PLANES WITH SELECTIVE EPITAXIAL-GROWTH, Applied optics, 35(19), 1996, pp. 3466-3470
CHARACTERIZATION OF SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH OFSILICON
Authors: BASHIR R NEUDECK GW HAW Y KVAM EP DENTON JP
Citation: R. Bashir et al., CHARACTERIZATION OF SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH OFSILICON, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 13(3), 1995, pp. 923-927
CHARACTERIZATION AND MODELING OF SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH OF SILICON
Authors: BASHIR R NEUDECK GW HAW Y KVAM EP
Citation: R. Bashir et al., CHARACTERIZATION AND MODELING OF SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH OF SILICON, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 13(3), 1995, pp. 928-935
DEGRADATION OF INSULATORS IN SILICON SELECTIVE EPITAXIAL-GROWTH (SEG)AMBIENT
Authors: BASHIR R KIM S QADRI N JIN D NEUDECK GW DENTON JP YERIC G WU K TASCH A
Citation: R. Bashir et al., DEGRADATION OF INSULATORS IN SILICON SELECTIVE EPITAXIAL-GROWTH (SEG)AMBIENT, IEEE electron device letters, 16(9), 1995, pp. 382-384
DEFECT STRUCTURES IN SILICON MERGED EPITAXIAL LATERAL OVERGROWTH
Authors: SAMAVEDAM SB KVAM EP KABIR AE NEUDECK GW
Citation: Sb. Samavedam et al., DEFECT STRUCTURES IN SILICON MERGED EPITAXIAL LATERAL OVERGROWTH, Journal of electronic materials, 24(11), 1995, pp. 1747-1751
LOW DEFECT PLANAR SOI ISLANDS ADJACENT TO SELECTIVE EPITAXIAL-GROWTH (SEG)
Authors: KESSLER J NEUDECK GW GLENN JL
Citation: J. Kessler et al., LOW DEFECT PLANAR SOI ISLANDS ADJACENT TO SELECTIVE EPITAXIAL-GROWTH (SEG), Microelectronic engineering, 28(1-4), 1995, pp. 435-438
CRYSTAL SILICON FABRY-PEROT CAVITIES DEPOSITED WITH DICHLOROSILANE INA REDUCED PRESSURE CHEMICAL-VAPOR-DEPOSITION REACTOR FOR THERMAL SENSING
Authors: CHAO HC NEUDECK GW
Citation: Hc. Chao et Gw. Neudeck, CRYSTAL SILICON FABRY-PEROT CAVITIES DEPOSITED WITH DICHLOROSILANE INA REDUCED PRESSURE CHEMICAL-VAPOR-DEPOSITION REACTOR FOR THERMAL SENSING, Electronics Letters, 31(13), 1995, pp. 1101-1102
TEMPERATURE-DEPENDENT I(D)-V(D) CHARACTERISTICS AND ANALYTICAL MODEL FOR A-SI-H THIN-FILM TRANSISTORS
Authors: LEE WS NEUDECK GW HAN MK
Citation: Ws. Lee et al., TEMPERATURE-DEPENDENT I(D)-V(D) CHARACTERISTICS AND ANALYTICAL MODEL FOR A-SI-H THIN-FILM TRANSISTORS, Solid-state electronics, 37(11), 1994, pp. 1892-1898
A NOVEL HIGH-SPEED SILICON BIPOLAR-TRANSISTOR UTILIZING SEG AND CLSEG
Authors: SIEKKINEN JW NEUDECK GW GLENN JL VENKATESAN S
Citation: Jw. Siekkinen et al., A NOVEL HIGH-SPEED SILICON BIPOLAR-TRANSISTOR UTILIZING SEG AND CLSEG, I.E.E.E. transactions on electron devices, 41(5), 1994, pp. 862-864
A NEW LINEAR SWEEP TECHNIQUE TO MEASURE GENERATION LIFETIMES IN THIN-FILM SOI MOSFETS
Authors: VENKATESAN S PIERRET RF NEUDECK GW
Citation: S. Venkatesan et al., A NEW LINEAR SWEEP TECHNIQUE TO MEASURE GENERATION LIFETIMES IN THIN-FILM SOI MOSFETS, I.E.E.E. transactions on electron devices, 41(4), 1994, pp. 567-574
POLYSILICON FABRY-PEROT CAVITIES DEPOSITED WITH DICHLOROSILANE IN A REDUCED PRESSURE CHEMICAL-VAPOR-DEPOSITION REACTOR FOR THERMAL SENSING
Authors: CHAO HC NEUDECK GW
Citation: Hc. Chao et Gw. Neudeck, POLYSILICON FABRY-PEROT CAVITIES DEPOSITED WITH DICHLOROSILANE IN A REDUCED PRESSURE CHEMICAL-VAPOR-DEPOSITION REACTOR FOR THERMAL SENSING, Electronics Letters, 30(1), 1994, pp. 80-81
DOPING OF POLYCRYSTALLINE SILICON FILMS USING AN ARSENIC SPIN-ON-GLASS SOURCE AND SURFACE SMOOTHNESS
Authors: BASHIR R VENKATESAN S YEN H NEUDECK GW KVAM EP
Citation: R. Bashir et al., DOPING OF POLYCRYSTALLINE SILICON FILMS USING AN ARSENIC SPIN-ON-GLASS SOURCE AND SURFACE SMOOTHNESS, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 11(5), 1993, pp. 1903-1905
MICROSTRUCTURAL EXAMINATION OF EXTENDED CRYSTAL DEFECTS IN SILICON SELECTIVE EPITAXIAL-GROWTH
Authors: YEN H KVAM EP BASHIR R NEUDECK GW
Citation: H. Yen et al., MICROSTRUCTURAL EXAMINATION OF EXTENDED CRYSTAL DEFECTS IN SILICON SELECTIVE EPITAXIAL-GROWTH, Journal of electronic materials, 22(11), 1993, pp. 1331-1339
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