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Results: 76-100/365
Authors:
HUNG YF
Citation: Yf. Hung, SCHEDULING OF MASK SHOP E-BEAM WRITERS, IEEE transactions on semiconductor manufacturing, 11(1), 1998, pp. 165-172
Authors:
VENKATESH S
DAVENPORT R
FOXHOVEN P
NULMAN J
Citation: S. Venkatesh et al., A STEADY-STATE THROUGHPUT ANALYSIS OF CLUSTER TOOLS - DUAL-BLADE VERSUS SINGLE-BLADE ROBOTS, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 418-424
Authors:
LU GQ
RUBLOFF GW
DURHAM J
Citation: Gq. Lu et al., CONTAMINATION CONTROL FOR GAS DELIVERY FROM A LIQUID SOURCE IN SEMICONDUCTOR MANUFACTURING, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 425-432
Authors:
FAN YH
QIU TQ
Citation: Yh. Fan et Tq. Qiu, ANALYSES OF THERMAL-STRESSES AND CONTROL SCHEMES FOR FAST TEMPERATURERAMPS OF BATCH FURNACES, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 433-437
Authors:
HIRASAWA S
SAITO Y
NEZU H
OHASHI N
MARUYAMA H
Citation: S. Hirasawa et al., ANALYSIS OF DRYING SHRINKAGE AND FLOW DUE TO SURFACE-TENSION OF SPIN-COATED FILMS ON TOPOGRAPHIC SUBSTRATES, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 438-444
Authors:
GIBSON DS
PODDAR R
MAY GS
BROOKE MA
Citation: Ds. Gibson et al., STATISTICALLY BASED PARAMETRIC YIELD PREDICTION FOR INTEGRATED-CIRCUITS, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 445-458
Authors:
NIKOONAHAD M
WAYMAN CE
BIELLAK SA
Citation: M. Nikoonahad et al., DEFECT DETECTION ALGORITHM FOR WAFER INSPECTION BASED ON LASER-SCANNING, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 459-468
Authors:
RIETMAN EA
FRIEDMAN DJ
LORY ER
Citation: Ea. Rietman et al., PREPRODUCTION RESULTS DEMONSTRATING MULTIPLE-SYSTEM MODELS FOR YIELD ANALYSIS, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 469-481
Authors:
SENGUPTA C
CAVALLARO JR
WILSON WL
TITTEL FK
Citation: C. Sengupta et al., AUTOMATED EVALUATION OF CRITICAL FEATURES IN VLSI LAYOUTS BASED ON PHOTOLITHOGRAPHIC SIMULATIONS, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 482-494
Authors:
MOGUL HC
MCPHERSON JW
PARRILL TM
Citation: Hc. Mogul et al., BUILDING-IN RELIABILITY INTO VLSI JUNCTIONS, IEEE transactions on semiconductor manufacturing, 10(4), 1997, pp. 495-497
Authors:
MAY GS
Citation: Gs. May, UNTITLED, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 325-326
Authors:
LEANG S
SPANOS CJ
Citation: S. Leang et Cj. Spanos, A GENERAL EQUIPMENT DIAGNOSTIC SYSTEM AND ITS APPLICATION ON PHOTOLITHOGRAPHIC SEQUENCES, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 329-343
Authors:
FRIEDMAN DJ
HANSEN MH
NAIR VN
JAMES DA
Citation: Dj. Friedman et al., MODEL-FREE ESTIMATION OF DEFECT CLUSTERING IN INTEGRATED-CIRCUIT FABRICATION, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 344-359
Authors:
PETERS BA
YANG T
Citation: Ba. Peters et T. Yang, INTEGRATED FACILITY LAYOUT AND MATERIAL HANDLING-SYSTEM DESIGN IN SEMICONDUCTOR FABRICATION FACILITIES, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 360-369
Authors:
KUMAR MV
LUKASZEK W
PLUMMER JD
Citation: Mv. Kumar et al., A TEST STRUCTURE ADVISER AND A COUPLED, LIBRARY-BASED TEST STRUCTURE LAYOUT AND TESTING ENVIRONMENT, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 370-383
Authors:
SATYA AVS
Citation: Avs. Satya, MICROELECTRONIC TEST STRUCTURES FOR RAPID AUTOMATED CONTACTLESS IN-LINE DEFECT INSPECTION, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 384-389
Authors:
LU GQ
BORA M
RUBLOFF GW
Citation: Gq. Lu et al., POLYSILICON RTCVD PROCESS OPTIMIZATION FOR ENVIRONMENTALLY-CONSCIOUS MANUFACTURING, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 390-398
Authors:
MOHINDRA V
CHAE H
SAWIN HH
MOCELLA MT
Citation: V. Mohindra et al., ABATEMENT OF PERFLUOROCOMPOUNDS (PFCS) IN A MICROWAVE TUBULAR REACTORUSING O-2 AS AN ADDITIVE GAS, IEEE transactions on semiconductor manufacturing, 10(3), 1997, pp. 399-411
Authors:
JEPPSON KO
WALTON AJ
Citation: Ko. Jeppson et Aj. Walton, GUEST EDITORIAL - ICMTS96, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 194-195
Authors:
HIMENO T
HAZAMA H
YAEGASHI T
SAKUI K
KANDA K
ITOH Y
MIYAMOTO J
Citation: T. Himeno et al., QUICK ADDRESS DETECTION OF ANOMALOUS MEMORY CELLS IN A FLASH MEMORY TEST STRUCTURE, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 196-200
Authors:
VONARX M
PAUL O
BALTES H
Citation: M. Vonarx et al., TEST STRUCTURES TO MEASURE THE SEEBECK COEFFICIENT OF CMOS IC POLYSILICON, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 201-208
Authors:
BASTOS J
STEYAERT MSJ
PERGOOT A
SANSEN WM
Citation: J. Bastos et al., INFLUENCE OF DIE ATTACHMENT ON MOS-TRANSISTOR MATCHING, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 209-218
Authors:
PERSIANO GV
BELLONE S
Citation: Gv. Persiano et S. Bellone, TEST STRUCTURE DESIGN FOR THE EVALUATION OF CARRIER-CARRIER SCATTERING EFFECT ON HOLE AND ELECTRON MOBILITIES, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 219-227
Authors:
WATANABE H
KOMORI J
HIGASHITANI K
SEKINE M
KOYAMA H
Citation: H. Watanabe et al., A WAFER LEVEL MONITORING METHOD FOR PLASMA-CHARGING DAMAGE USING ANTENNA PMOSFET TEST STRUCTURE, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 228-232
Authors:
NOUET P
TOULOUSE A
Citation: P. Nouet et A. Toulouse, USE OF TEST STRUCTURES FOR CHARACTERIZATION AND MODELING OF INTER-LAYER AND INTRA-LAYER CAPACITANCES IN A CMOS PROCESS, IEEE transactions on semiconductor manufacturing, 10(2), 1997, pp. 233-241