Citation: Tm. Roh et al., Electrical properties of ultrathin oxide grown by high pressure oxidation and N2O nitridation for ULSI device applications, INT J ELECT, 88(4), 2001, pp. 423-434
Authors:
Kim, J
Roh, TM
Kim, SG
Song, QS
Lee, DW
Koo, JG
Cho, KI
Ma, DS
Citation: J. Kim et al., High-voltage power integrated circuit technology using SOI for driving plasma display panels, IEEE DEVICE, 48(6), 2001, pp. 1256-1263
Authors:
Kim, SG
Kim, J
Koo, JG
Nam, KS
Cho, KI
Bae, IH
Citation: Sg. Kim et al., Trench formation and filling technique for dielectric isolation of plasma display panel driver integrated circuits, J VAC SCI B, 18(5), 2000, pp. 2482-2485
Authors:
Nam, KS
Lee, JW
Kim, SG
Roh, TM
Park, HS
Koo, JG
Cho, KI
Citation: Ks. Nam et al., A novel simplified process for fabricating a very high density P-channel trench gate power MOSFET, IEEE ELEC D, 21(7), 2000, pp. 365-367
Authors:
Roh, TM
Lee, DW
Kim, J
Kim, SG
Song, QS
Kang, JY
Koo, JG
Nam, KS
Cho, KI
Citation: Tm. Roh et al., High-voltage SOI power IC technology with non-RESURF n-LDMOSFET and RESURFp-LDMOSFET for PDP scan-driver applications, J KOR PHYS, 37(6), 2000, pp. 889-892
Authors:
Roh, TM
Lee, DW
Kim, J
Kim, SG
Koo, JG
Nam, KS
Kim, DY
Citation: Tm. Roh et al., Characteristics of ultrathin oxide grown by high pressure oxidation for ULSI device applications, J KOR PHYS, 34, 1999, pp. S538-S541
Authors:
Lee, DW
Roh, TM
Kim, J
Koo, JG
Nam, KS
Kim, DY
Park, HS
Citation: Dw. Lee et al., Effects of drain structures on the hot-carrier degradation of high-voltageLDMOS transistors, J KOR PHYS, 34, 1999, pp. S542-S545
Authors:
Kim, J
Kim, SG
Koo, JG
Roh, TM
Park, HS
Kim, DY
Citation: J. Kim et al., Characteristics of dynamic resistance in a heavily doped silicon semiconductor resistor, INT J ELECT, 86(3), 1999, pp. 269-279
Authors:
Kim, J
Kim, SG
Song, QS
Lee, SY
Koo, JG
Ma, DS
Citation: J. Kim et al., Improvement on P-channel SOI LDMOS transistor by adapting a new tapered oxide technique, IEEE DEVICE, 46(9), 1999, pp. 1890-1894
Authors:
Lee, DW
Roh, TM
Park, HS
Kim, J
Koo, JG
Kim, DY
Citation: Dw. Lee et al., Fabrication technology of polysilicon resistors using novel mixed process for analogue CMOS applications, ELECTR LETT, 35(7), 1999, pp. 603-604