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Results:
1-18
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Results: 18
Authors:
Yang, N
Wortman, JJ
Citation: N. Yang et Jj. Wortman, A study of the effects of tunneling currents and reliability of sub-2 nm gate oxides on scaled n-MOSFETs, MICROEL REL, 41(1), 2001, pp. 37-46
Authors:
Yang, N
Henson, WK
Wortman, JJ
Citation: N. Yang et al., A comparative study of gate direct tunneling and drain leakage currents inN-MOSFET's with sub-2-nm gate oxides, IEEE DEVICE, 47(8), 2000, pp. 1636-1644
Authors:
Ahmed, K
Ibok, E
Bains, G
Chi, D
Ogle, B
Wortman, JJ
Hauser, JR
Citation: K. Ahmed et al., Comparative physical and electrical metrology of ultrathin oxides in the 6to 1.5 nm regime, IEEE DEVICE, 47(7), 2000, pp. 1349-1354
Authors:
Henson, WK
Yang, N
Kubicek, S
Vogel, EM
Wortman, JJ
De Meyer, K
Naem, A
Citation: Wk. Henson et al., Analysis of leakage currents and impact on off-state power consumption forCMOS technology in the 100-nm regime, IEEE DEVICE, 47(7), 2000, pp. 1393-1400
Authors:
Yang, N
Henson, WK
Hauser, JR
Wortman, JJ
Citation: N. Yang et al., Estimation of the effects of remote charge scattering on electron mobilityof n-MOSFET's with ultrathin gate oxides, IEEE DEVICE, 47(2), 2000, pp. 440-447
Authors:
Ahmed, K
Wortman, JJ
Hauser, JR
Citation: K. Ahmed et al., A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides, IEEE DEVICE, 47(11), 2000, pp. 2236-2237
Authors:
Misra, V
Lazar, H
Wang, Z
Wu, Y
Niimi, H
Lucovsky, G
Wortman, JJ
Hauser, JR
Citation: V. Misra et al., Interfacial properties of ultrathin pure silicon nitride formed by remote plasma enhanced chemical vapor deposition, J VAC SCI B, 17(4), 1999, pp. 1836-1839
Authors:
Ibok, E
Ahmed, K
Hao, MY
Ogle, B
Wortman, JJ
Hauser, JR
Citation: E. Ibok et al., Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics, IEEE ELEC D, 20(9), 1999, pp. 442-444
Authors:
Henson, WK
Ahmed, KZ
Vogel, EM
Hauser, JR
Wortman, JJ
Venables, RD
Xu, M
Venables, D
Citation: Wk. Henson et al., Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors, IEEE ELEC D, 20(4), 1999, pp. 179-181
Authors:
Henson, WK
Yang, N
Wortman, JJ
Citation: Wk. Henson et al., Observation of oxide breakdown and its effects on the characteristics of ultra-thin-oxide nMOSFET's, IEEE ELEC D, 20(12), 1999, pp. 605-607
Authors:
Shanware, A
Massoud, HZ
Acker, A
Li, VZQ
Mirabedini, MR
Henson, K
Hauser, JR
Wortman, JJ
Citation: A. Shanware et al., The effects of Ge content in poly-Si1-xGex gate material on the tunneling barrier in PMOS devices, MICROEL ENG, 48(1-4), 1999, pp. 39-42
Authors:
Masson, P
Morfouli, P
Autran, JL
Wortman, JJ
Citation: P. Masson et al., Electrical characterization of n-channel MOSFETs with oxynitride gate dielectric formed by low-pressure Rapid Thermal Chemical Vapor Deposition, MICROEL ENG, 48(1-4), 1999, pp. 211-214
Authors:
Shanware, A
Massoud, HZ
Vogel, E
Henson, K
Hauser, JR
Wortman, JJ
Citation: A. Shanware et al., Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and SiO2/Ta2O5 dielectrics with oxide scaling, MICROEL ENG, 48(1-4), 1999, pp. 295-298
Authors:
Masson, P
Morfouli, P
Autran, JL
Brini, J
Balland, B
Vogel, EM
Wortman, JJ
Citation: P. Masson et al., Electrical properties of oxynitride thin films using noise and charge pumping measurements, J NON-CRYST, 245, 1999, pp. 54-58
Authors:
Ahmed, K
Ibok, E
Yeap, GCF
Xiang, Q
Ogle, B
Wortman, JJ
Hauser, JR
Citation: K. Ahmed et al., Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-angstrom gate oxide MOSFET's, IEEE DEVICE, 46(8), 1999, pp. 1650-1655
Authors:
Yang, N
Henson, WK
Hauser, JR
Wortman, JJ
Citation: N. Yang et al., Modeling study of ultrathin gate oxides using direct tunneling current andcapacitance-voltage measurements in MOS devices, IEEE DEVICE, 46(7), 1999, pp. 1464-1471
A low-thermal-budget in situ doped multilayer silicon epitaxy process for MOSFET channel engineering
Authors:
Ban, I
Ozturk, MC
Misra, V
Wortman, JJ
Venables, D
Maher, DM
Citation: I. Ban et al., A low-thermal-budget in situ doped multilayer silicon epitaxy process for MOSFET channel engineering, J ELCHEM SO, 146(3), 1999, pp. 1189-1196
Authors:
Li, VZQ
Mirabedini, MR
Vogel, E
Henson, K
Batchelor, D
Wortman, JJ
Kuehn, RT
Citation: Vzq. Li et al., Effects of Si source gases (SiH4 and Si2H6) on polycrystalline-Si1-xGex deposited on oxide by RTCVD, EL SOLID ST, 1(3), 1998, pp. 153-155
Risultati:
1-18
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