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Results: 1-17 |
Results: 17

Authors: Trajkovic, T Udrea, F Waind, PR Thomson, J Amaratunga, GAJ Milne, WI
Citation: T. Trajkovic et al., Optimum design of 1.4kV non-punch-through trench IGBTs: the next generation of high-power switching devices, IEE P-CIRC, 148(2), 2001, pp. 71-74

Authors: Udrea, F Gardner, JW Setiadi, D Covington, JA Dogaru, T Lua, CC Milne, WI
Citation: F. Udrea et al., Design and simulations of SOICMOS micro-hotplate gas sensors, SENS ACTU-B, 78(1-3), 2001, pp. 180-190

Authors: Huang, S Amaratunga, GAJ Udrea, F
Citation: S. Huang et al., A novel single gate MOS controlled current saturated thyristor, IEEE ELEC D, 22(9), 2001, pp. 438-440

Authors: Ionicioiu, R Amaratunga, G Udrea, F
Citation: R. Ionicioiu et al., Quantum computation with ballistic electrons, INT J MOD B, 15(2), 2001, pp. 125-133

Authors: Huang, S Sheng, K Udrea, F Amaratunga, GAJ
Citation: S. Huang et al., A dynamic n-buffer insulated gate bipolar transistor, SOL ST ELEC, 45(1), 2001, pp. 173-182

Authors: Huang, S Amaratunga, GAJ Udrea, F Sheng, K Waind, P Coulbeck, L Taylor, P
Citation: S. Huang et al., A dual-channel IEGT, MICROELEC J, 32(9), 2001, pp. 755-761

Authors: Garner, DM Udrea, F Lim, HT Ensell, G Popescu, AE Sheng, K Milne, WI
Citation: Dm. Garner et al., Silicon-on-insulator power integrated circuits, MICROELEC J, 32(5-6), 2001, pp. 517-526

Authors: Brezeanu, G Badila, M Tudor, B Millan, J Godignon, P Udrea, F Amaratunga, GAJ Mihaila, A
Citation: G. Brezeanu et al., Accurate modeling and parameter extraction for 6H-SiC Schottky barrier diodes (SBDs) with nearly ideal breakdown voltage, IEEE DEVICE, 48(9), 2001, pp. 2148-2153

Authors: Udrea, F Garner, D Sheng, K Popescu, A Lim, HT Milne, WI
Citation: F. Udrea et al., SOI power devices, ELECT COMM, 12(1), 2000, pp. 27-40

Authors: Sheng, K Udrea, F Amaratunga, GAJ
Citation: K. Sheng et al., Optimum carrier distribution of the IGBT, SOL ST ELEC, 44(9), 2000, pp. 1573-1583

Authors: Garner, DM Udrea, F Lim, HT Milne, WI
Citation: Dm. Garner et al., The integration of high-side and low-side LIGBTs on partial silicon-on-insulator, SOL ST ELEC, 44(6), 2000, pp. 929-935

Authors: Ng, R Udrea, F Amaratunga, G
Citation: R. Ng et al., An analytical model for the 3D-RESURF effect, SOL ST ELEC, 44(10), 2000, pp. 1753-1764

Authors: Huang, S Amaratunga, GAJ Udrea, F
Citation: S. Huang et al., Analysis of SEB and SEGR in super-junction MOSFETs, IEEE NUCL S, 47(6), 2000, pp. 2640-2647

Authors: Udrea, F Chan, SSM Thomson, S Trajkovic, T Waind, PR Amaratunga, GAJ Crees, DE
Citation: F. Udrea et al., 1.2 kV trench insulated gate bipolar transistors (IGBT's) with ultralow on-resistance, IEEE ELEC D, 20(8), 1999, pp. 428-430

Authors: Lim, HT Udrea, F Garner, DM Milne, WI
Citation: Ht. Lim et al., Modelling of self-heating effect in thin SOI and Partial SOI LDMOS power devices, SOL ST ELEC, 43(7), 1999, pp. 1267-1280

Authors: Garner, DM Udrea, F Lim, HT Milne, WI
Citation: Dm. Garner et al., An analytic model for turn off in the silicon-on-insulator LIGBT, SOL ST ELEC, 43(10), 1999, pp. 1855-1868

Authors: Trajkovic, T Udrea, F Amaratunga, GAJ Milne, WI Chan, SSM Waind, PR Thomson, J Crees, DE
Citation: T. Trajkovic et al., Silicon MOS controlled bipolar power switching devices using trench technology, INT J ELECT, 86(10), 1999, pp. 1153-1168
Risultati: 1-17 |