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Results: 76-100/3259
Authors:
Wang, GF
Qi, XN
Yu, ZP
Dutton, RW
Citation: Gf. Wang et al., Device level modeling of metal-insulator-semiconductor interconnects, IEEE DEVICE, 48(8), 2001, pp. 1672-1682
Authors:
Gan, KJ
Citation: Kj. Gan, The low-high-low I-V characteristics of five to seven peaks based on four NDR devices, IEEE DEVICE, 48(8), 2001, pp. 1683-1687
Authors:
Deen, MJ
Marinov, O
Yu, JF
Holdcroft, S
Woods, W
Citation: Mj. Deen et al., Low-frequency noise in polymer transistors, IEEE DEVICE, 48(8), 2001, pp. 1688-1695
Authors:
Ielmini, D
Spinelli, AS
Lacaita, AL
DiMaria, DJ
Ghidini, G
Citation: D. Ielmini et al., A detailed investigation of the quantum yield experiment, IEEE DEVICE, 48(8), 2001, pp. 1696-1702
Authors:
Levinshtein, ME
Mnatsakanov, TT
Ivanov, P
Palmour, JW
Rumyantsev, SL
Singh, R
Yurkov, SN
Citation: Me. Levinshtein et al., "Paradoxes" of carrier lifetime measurements in high-voltage SiC diodes, IEEE DEVICE, 48(8), 2001, pp. 1703-1710
Authors:
Linewih, H
Dimitrijev, S
Weitzel, CE
Harrison, HB
Citation: H. Linewih et al., Novel SiC accumulation-mode power MOSFET, IEEE DEVICE, 48(8), 2001, pp. 1711-1717
Authors:
Kory, CL
Citation: Cl. Kory, Investigation of fully three-dimensional helical RF field effects on TWT beam/circuit interaction, IEEE DEVICE, 48(8), 2001, pp. 1718-1726
Authors:
Belyavskiy, ED
Goncharov, IA
Martynyuk, AE
Svirid, VA
Khotiaintsev, SN
Citation: Ed. Belyavskiy et al., Two-dimensional small-signal analysis of backward-wave oscillation in a helix traveling-wave tube under Brillouin-flow, periodic permanent magnetic focusing, IEEE DEVICE, 48(8), 2001, pp. 1727-1736
Authors:
Versari, R
Esseni, D
Falavigna, G
Lanzoni, M
Ricco, B
Citation: R. Versari et al., Bandwidth optimization of flash memories with the RGP technique, IEEE DEVICE, 48(8), 2001, pp. 1737-1740
Authors:
Thei, KB
Liu, WC
Chuang, HM
Lin, KW
Cheng, CC
Ho, CH
Su, CW
Wuu, SG
Wang, CS
Citation: Kb. Thei et al., A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-mu m CMOS devices applications, IEEE DEVICE, 48(8), 2001, pp. 1740-1742
Authors:
Lau, MM
Chiang, CYT
Yeow, YT
Yao, ZQ
Citation: Mm. Lau et al., A new method of threshold voltage extraction via MOSFET gate-to-substrate capacitance measurement, IEEE DEVICE, 48(8), 2001, pp. 1742-1744
Authors:
McAlister, SP
McKinnon, WR
Driad, R
Citation: Sp. Mcalister et al., Interpretation of the common-emitter offset voltage in heterojunction bipolar transistors, IEEE DEVICE, 48(8), 2001, pp. 1745-1747
Authors:
Hsu, BC
Liu, CW
Liu, WT
Lin, CH
Citation: Bc. Hsu et al., A PMOS tunneling photodetector, IEEE DEVICE, 48(8), 2001, pp. 1747-1749
Authors:
Kymissis, I
Dimitrakopoulos, CD
Purushothaman, S
Citation: I. Kymissis et al., High-performance bottom electrode organic thin-film transistors (vol 48, pg 1060, 2001), IEEE DEVICE, 48(8), 2001, pp. 1750-1750
Authors:
Ancona, MG
Yu, Z
Dutton, RW
Voorde, PJV
Vook, K
Cao, M
Citation: Mg. Ancona et al., Density-gradient analysis of MOS tunneling (vol 47, pg 2310, 2000), IEEE DEVICE, 48(8), 2001, pp. 1750-1750
Authors:
Mitros, JC
Tsai, CY
Shichijo, H
Kunz, K
Morton, A
Goodpaster, D
Mosher, D
Efland, TR
Citation: Jc. Mitros et al., High-voltage drain extended MOS transistors for 0.18-mu m logic CMOS process, IEEE DEVICE, 48(8), 2001, pp. 1751-1755
Authors:
Pham, NP
Sarro, PM
Ng, KT
Burghartz, JN
Citation: Np. Pham et al., IC-Compatible two-level bulk micromachining process module for RF silicon technology, IEEE DEVICE, 48(8), 2001, pp. 1756-1764
Authors:
Jouan, S
Baudry, H
Dutartre, D
Fellous, C
Laurens, M
Lenoble, D
Marty, M
Monroy, A
Perrotin, A
Ribot, P
Vincent, G
Chantre, A
Citation: S. Jouan et al., Suppression of boron transient-enhanced diffusion in SiGeHBTs by a buried carbon layer, IEEE DEVICE, 48(8), 2001, pp. 1765-1769
Authors:
Jurczak, M
Skotnicki, T
Gwoziecki, R
Paoli, M
Tormen, B
Ribot, P
Dutartre, D
Monfray, S
Galvier, J
Citation: M. Jurczak et al., Dielectric pockets - A new concept of the junctions for deca-nanometric CMOS devices, IEEE DEVICE, 48(8), 2001, pp. 1770-1775
Authors:
Woerlee, PH
Knitel, MJ
van Langevelde, R
Klaassen, DBM
Tiemeijer, LF
Scholten, AJ
Duijnhoven, ATAZV
Citation: Ph. Woerlee et al., RF-CMOS performance trends, IEEE DEVICE, 48(8), 2001, pp. 1776-1782
Authors:
Schulz, T
Rosner, W
Risch, L
Korbel, A
Langmann, U
Citation: T. Schulz et al., Short-channel vertical sidewall MOSFETs, IEEE DEVICE, 48(8), 2001, pp. 1783-1788
Authors:
De Salvo, B
Ghibaudo, G
Pananakakis, G
Masson, P
Baron, T
Buffet, N
Fernandes, A
Guillaumot, B
Citation: B. De Salvo et al., Experimental and theoretical investigation of nano-crystal and nitride-trap memory devices, IEEE DEVICE, 48(8), 2001, pp. 1789-1799
Authors:
Bowman, KA
Wang, LH
Tang, XH
Meindl, JD
Citation: Ka. Bowman et al., A circuit-level perspective of the optimum gate oxide thickness, IEEE DEVICE, 48(8), 2001, pp. 1800-1810
Authors:
Dalla Serra, A
Abramo, A
Palestri, P
Selmi, L
Widdershoven, F
Citation: A. Dalla Serra et al., Closed- and open-boundary models for gate-current calculation in n-MOSFETs, IEEE DEVICE, 48(8), 2001, pp. 1811-1815
Authors:
Ducroquet, F
Achard, H
Coudert, F
Previtali, B
Lugand, JF
Ulmer, L
Farjot, T
Gobil, Y
Heitzmann, M
Tedesco, S
Nier, ME
Deleonibus, S
Citation: F. Ducroquet et al., Full CMP integration of CVD TiN damascene sub-0.1-mu m metal gate devices for ULSI applications, IEEE DEVICE, 48(8), 2001, pp. 1816-1821