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Results: 1-25/176
CHARACTERIZATION OF SELF-HEATING IN ADVANCED VLSI INTERCONNECT LINES BASED ON THERMAL FINITE-ELEMENT SIMULATION
Authors: RZEPKA S BANERJEE K MEUSEL E HU CM
Citation: S. Rzepka et al., CHARACTERIZATION OF SELF-HEATING IN ADVANCED VLSI INTERCONNECT LINES BASED ON THERMAL FINITE-ELEMENT SIMULATION, IEEE transactions on components, packaging, and manufacturing technology. Part A, 21(3), 1998, pp. 406-411
GROWTH OF GALLIUM-PHOSPHIDE LAYERS BY CHEMICAL BEAM EPITAXY ON OXIDE PATTERNED (001)SILICON SUBSTRATES
Authors: NARAYANAN V SUKIDI N HU CM DIETZ N BACHMANN KJ MAHAJAN S SHINGUBARA S
Citation: V. Narayanan et al., GROWTH OF GALLIUM-PHOSPHIDE LAYERS BY CHEMICAL BEAM EPITAXY ON OXIDE PATTERNED (001)SILICON SUBSTRATES, Materials science & engineering. B, Solid-state materials for advanced technology, 54(3), 1998, pp. 207-209
INTERACTION RULED TEMPERATURE-DEPENDENCE OF THE ELECTRON-CYCLOTRON MASS IN GAAS HETEROJUNCTIONS
Authors: HU CM BATKE E KOHLER K GANSER P
Citation: Cm. Hu et al., INTERACTION RULED TEMPERATURE-DEPENDENCE OF THE ELECTRON-CYCLOTRON MASS IN GAAS HETEROJUNCTIONS, Physica. B, Condensed matter, 251, 1998, pp. 749-752
AN ON-CHIP, INTERCONNECT CAPACITANCE CHARACTERIZATION METHOD WITH SUB-FEMTO-FARAD RESOLUTION
Authors: CHEN JC SYLVESTER D HU CM
Citation: Jc. Chen et al., AN ON-CHIP, INTERCONNECT CAPACITANCE CHARACTERIZATION METHOD WITH SUB-FEMTO-FARAD RESOLUTION, IEEE transactions on semiconductor manufacturing, 11(2), 1998, pp. 204-210
SIMULATION OF SOI DEVICES AND CIRCUITS USING BSIM3SOI
Authors: SINITSKY D TANG S JANGITY A ASSADERAGHI F SHAHIDI G HU CM
Citation: D. Sinitsky et al., SIMULATION OF SOI DEVICES AND CIRCUITS USING BSIM3SOI, IEEE electron device letters, 19(9), 1998, pp. 323-325
ENHANCED HOT-CARRIER-INDUCED DEGRADATION IN SHALLOW TRENCH-ISOLATED NARROW CHANNEL PMOSFETS
Authors: CHEN JF ISHIMARU K HU CM
Citation: Jf. Chen et al., ENHANCED HOT-CARRIER-INDUCED DEGRADATION IN SHALLOW TRENCH-ISOLATED NARROW CHANNEL PMOSFETS, IEEE electron device letters, 19(9), 1998, pp. 332-334
LEAKAGE CURRENT COMPARISON BETWEEN ULTRA-THIN TA2O5 FILMS AND CONVENTIONAL GATE DIELECTRICS
Authors: LU Q PARK D KALNITSKY A CHANG C CHENG CC TAY SP KING TJ HU CM
Citation: Q. Lu et al., LEAKAGE CURRENT COMPARISON BETWEEN ULTRA-THIN TA2O5 FILMS AND CONVENTIONAL GATE DIELECTRICS, IEEE electron device letters, 19(9), 1998, pp. 341-342
0.35-MU-M ASYMMETRIC AND SYMMETRICAL LDD DEVICE COMPARISON USING A RELIABILITY SPEED/POWER METHODOLOGY/
Authors: CHEN JF TAO J FANG P HU CM
Citation: Jf. Chen et al., 0.35-MU-M ASYMMETRIC AND SYMMETRICAL LDD DEVICE COMPARISON USING A RELIABILITY SPEED/POWER METHODOLOGY/, IEEE electron device letters, 19(7), 1998, pp. 216-218
INVESTIGATION OF POLY-SI1-XGEX FOR DUAL-GATE CMOS TECHNOLOGY
Authors: LEE WC KING YC KING TJ HU CM
Citation: Wc. Lee et al., INVESTIGATION OF POLY-SI1-XGEX FOR DUAL-GATE CMOS TECHNOLOGY, IEEE electron device letters, 19(7), 1998, pp. 247-249
TRANSISTOR CHARACTERISTICS WITH TA2O5 GATE DIELECTRIC
Authors: PARK D KING Y LU Q KING TJ HU CM KALNITSKY A TAY SP CHENG CC
Citation: D. Park et al., TRANSISTOR CHARACTERISTICS WITH TA2O5 GATE DIELECTRIC, IEEE electron device letters, 19(11), 1998, pp. 441-443
PLASMA CHARGING DAMAGE ON ULTRATHIN GATE OXIDES
Authors: PARK D HU CM
Citation: D. Park et Cm. Hu, PLASMA CHARGING DAMAGE ON ULTRATHIN GATE OXIDES, IEEE electron device letters, 19(1), 1998, pp. 1-3
PLASMA IMMERSION ION-IMPLANTATION FOR SOI SYNTHESIS - SIMOX AND ION-CUT
Authors: LU X IYER SSK LEE J DOYLE B FAN ZN CHU PK HU CM CHEUNG NW
Citation: X. Lu et al., PLASMA IMMERSION ION-IMPLANTATION FOR SOI SYNTHESIS - SIMOX AND ION-CUT, Journal of electronic materials, 27(9), 1998, pp. 1059-1066
PREPARATION AND REACTION OF 3,3,3-TRIFLUOROPROPIONDITHIOACETALS AS TRIFLUOROMETHYL-CONTAINING BUILDING-BLOCKS
Authors: GUAN HP LUO BH WANG QF HU CM
Citation: Hp. Guan et al., PREPARATION AND REACTION OF 3,3,3-TRIFLUOROPROPIONDITHIOACETALS AS TRIFLUOROMETHYL-CONTAINING BUILDING-BLOCKS, Journal of the Chemical Society. Perkin transactions. I, (2), 1998, pp. 279-281
A UNIFIED MOSFET CHANNEL CHARGE MODEL FOR DEVICE MODELING IN CIRCUIT SIMULATION
Authors: CHENG YH CHEN K IMAI K HU CM
Citation: Yh. Cheng et al., A UNIFIED MOSFET CHANNEL CHARGE MODEL FOR DEVICE MODELING IN CIRCUIT SIMULATION, IEEE transactions on computer-aided design of integrated circuits and systems, 17(8), 1998, pp. 641-644
DC ELECTRICAL OXIDE THICKNESS MODEL FOR QUANTIZATION OF THE INVERSIONLAYER IN MOSFETS
Authors: KING YC FUJIOKA H KAMOHARA S CHEN K HU CM
Citation: Yc. King et al., DC ELECTRICAL OXIDE THICKNESS MODEL FOR QUANTIZATION OF THE INVERSIONLAYER IN MOSFETS, Semiconductor science and technology, 13(8), 1998, pp. 963-966
2 EXPERIMENTAL METHODS TO CHARACTERIZE LOAD CAPACITANCE OF A CMOS GATE
Authors: CHEN K HU CM FANG P LIN MR WOLLESEN DL
Citation: K. Chen et al., 2 EXPERIMENTAL METHODS TO CHARACTERIZE LOAD CAPACITANCE OF A CMOS GATE, Semiconductor science and technology, 13(7), 1998, pp. 773-775
SYNTHESIS OF 5-PER(POLY)FLUOROALKYL-2,3-DIHYDRO-1,4-DIAZEPINES
Authors: WANG QF HU B LUO BH HU CM
Citation: Qf. Wang et al., SYNTHESIS OF 5-PER(POLY)FLUOROALKYL-2,3-DIHYDRO-1,4-DIAZEPINES, Tetrahedron letters, 39(16), 1998, pp. 2377-2380
PLASMA CHARGING DAMAGE DURING OVER-ETCH TIME OF ALUMINUM
Authors: SHIN H PARK G HU CM
Citation: H. Shin et al., PLASMA CHARGING DAMAGE DURING OVER-ETCH TIME OF ALUMINUM, Solid-state electronics, 42(6), 1998, pp. 911-913
CHARACTERIZATION OF GLOBAL INVERSION LAYER IN THIN-GATE-OXIDE DEEP-SUBMICRON P-MOSFETS
Authors: YU B IMAI K HU CM
Citation: B. Yu et al., CHARACTERIZATION OF GLOBAL INVERSION LAYER IN THIN-GATE-OXIDE DEEP-SUBMICRON P-MOSFETS, Solid-state electronics, 42(3), 1998, pp. 401-404
ELECTROMIGRATION UNDER TIME-VARYING CURRENT STRESS
Authors: TAO J LIEW BK CHEN JF CHEUNG NW HU CM
Citation: J. Tao et al., ELECTROMIGRATION UNDER TIME-VARYING CURRENT STRESS, Microelectronics and reliability, 38(3), 1998, pp. 295-308
RELIABILITY PHENOMENA UNDER AC STRESS
Authors: HU CM
Citation: Cm. Hu, RELIABILITY PHENOMENA UNDER AC STRESS, Microelectronics and reliability, 38(1), 1998, pp. 1-5
TERT-BUTYL -TETRAFLUORO-1'-PROPENYL)OXAZOLIDINE-3-CARBOXYLATE - PREPARATION AND ITS NUCLEOPHILIC REACTIONS WITH ALCOHOLS
Authors: PENG S QING FL HU CM
Citation: S. Peng et al., TERT-BUTYL -TETRAFLUORO-1'-PROPENYL)OXAZOLIDINE-3-CARBOXYLATE - PREPARATION AND ITS NUCLEOPHILIC REACTIONS WITH ALCOHOLS, Journal of fluorine chemistry, 88(1), 1998, pp. 1-2
SYNTHESIS OF (2R)-N-BOC-2-AMINO-4,4,4-TRIFLUOROBUTANOIC ACID USING TRIFLUOROMETHYLATION OF GARNER ALDEHYDE
Authors: QING FL PENG S HU CM
Citation: Fl. Qing et al., SYNTHESIS OF (2R)-N-BOC-2-AMINO-4,4,4-TRIFLUOROBUTANOIC ACID USING TRIFLUOROMETHYLATION OF GARNER ALDEHYDE, Journal of fluorine chemistry, 88(1), 1998, pp. 79-81
NEW TI-SALICIDE PROCESS USING SB AND GE PREAMORPHIZATION FOR SUB-O.2 MU-M CMOS TECHNOLOGY
Authors: XU QX HU CM
Citation: Qx. Xu et Cm. Hu, NEW TI-SALICIDE PROCESS USING SB AND GE PREAMORPHIZATION FOR SUB-O.2 MU-M CMOS TECHNOLOGY, I.E.E.E. transactions on electron devices, 45(9), 1998, pp. 2002-2009
GATE ENGINEERING FOR DEEP-SUBMICRON CMOS TRANSISTORS
Authors: YU B JU DH LEE WC KEPLER N KING TJ HU CM
Citation: B. Yu et al., GATE ENGINEERING FOR DEEP-SUBMICRON CMOS TRANSISTORS, I.E.E.E. transactions on electron devices, 45(6), 1998, pp. 1253-1262
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