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Results: 1-25/33
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON METHODS TO MATCH A TEST PATTERN GENERATOR TO A CIRCUIT-UNDER-TEST, IEEE transactions on very large scale integration (VLSI) systems, 6(3), 1998, pp. 432-444
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, DESIGN-FOR-TESTABILITY FOR PATH DELAY FAULTS IN LARGE COMBINATIONAL-CIRCUITS USING TEST POINTS, IEEE transactions on computer-aided design of integrated circuits and systems, 17(4), 1998, pp. 333-343
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, LOW-COMPLEXITY FAULT SIMULATION UNDER THE MULTIPLE OBSERVATION TIME AND THE RESTRICTED MULTIPLE OBSERVATION TIME TESTING APPROACHES, IEEE transactions on computer-aided design of integrated circuits and systems, 17(3), 1998, pp. 269-278
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, TEST SEQUENCES TO ACHIEVE HIGH DEFECT COVERAGE FOR SYNCHRONOUS SEQUENTIAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 17(10), 1998, pp. 1017-1029
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, LOCATION OF STUCK-AT FAULTS AND BRIDGING FAULTS BASED ON CIRCUIT PARTITIONING, I.E.E.E. transactions on computers, 47(10), 1998, pp. 1124-1135
Authors:
KANOUN K
POMERANZ I
Citation: K. Kanoun et I. Pomeranz, SPECIAL ISSUE ON DEPENDABILITY OF COMPUTING SYSTEMS - INTRODUCTION, I.E.E.E. transactions on computers, 47(1), 1998, pp. 1-1
Authors:
REDDY SM
POMERANZ I
KAJIHARA S
Citation: Sm. Reddy et al., COMPACT TEST SETS FOR HIGH DEFECT COVERAGE, IEEE transactions on computer-aided design of integrated circuits and systems, 16(8), 1997, pp. 923-930
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, LOCSTEP - A LOGIC-SIMULATION-BASED TEST-GENERATION PROCEDURE, IEEE transactions on computer-aided design of integrated circuits and systems, 16(5), 1997, pp. 544-554
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON ERROR-CORRECTION IN MACRO-BASED CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 16(10), 1997, pp. 1088-1100
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, TEST-GENERATION FOR MULTIPLE STATE-TABLE FAULTS IN FINITE-STATE MACHINES, I.E.E.E. transactions on computers, 46(7), 1997, pp. 783-794
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON DICTIONARY-BASED FAULT LOCATION IN DIGITAL LOGIC-CIRCUITS, I.E.E.E. transactions on computers, 46(1), 1997, pp. 48-59
Authors:
OREN R
MOSHKOWITZ M
ODES S
BECKER S
KETER D
POMERANZ I
SHIRIN C
REISFELD I
BROIDE E
LAVY A
FICH A
ELIAKIM R
PATZ J
VILLA Y
ARBER N
GILAT T
Citation: R. Oren et al., METHOTREXATE IN CHRONIC ACTIVE CROHNS-DISEASE - A DOUBLE-BLIND, RANDOMIZED, ISRAELI MULTICENTER TRIAL, The American journal of gastroenterology, 92(12), 1997, pp. 2203-2209
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON REMOVING REDUNDANCIES FROM SYNCHRONOUS SEQUENTIAL-CIRCUITS WITH SYNCHRONIZING SEQUENCES, I.E.E.E. transactions on computers, 45(1), 1996, pp. 20-32
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON THE NUMBER OF TESTS TO DETECT ALL PATH DELAY FAULTS IN COMBINATIONAL LOGIC-CIRCUITS, I.E.E.E. transactions on computers, 45(1), 1996, pp. 50-62
Authors:
OREN R
ARBER N
ODES S
MOSHKOWITZ M
KETER D
POMERANZ I
RON Y
REISFELD I
BROIDE E
LAVY A
FICH A
ELIAKIM R
PATZ J
BARDAN E
VILLA Y
GILAT T
Citation: R. Oren et al., METHOTREXATE IN CHRONIC ACTIVE ULCERATIVE-COLITIS - A DOUBLE-BLIND, RANDOMIZED, ISRAELI MULTICENTER TRIAL, Gastroenterology, 110(5), 1996, pp. 1416-1421
Authors:
ORENSTEIN T
KOHAVI Z
POMERANZ I
Citation: T. Orenstein et al., AN OPTIMAL ALGORITHM FOR CYCLE BREAKING IN DIRECTED-GRAPHS, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 7(1-2), 1995, pp. 71-81
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON CORRECTION OF MULTIPLE DESIGN ERRORS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(2), 1995, pp. 255-264
Authors:
KAJIHARA S
POMERANZ I
KINOSHITA K
REDDY SM
Citation: S. Kajihara et al., COST-EFFECTIVE GENERATION OF MINIMAL TEST SETS FOR STUCK-AT FAULTS INCOMBINATIONAL LOGIC-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(12), 1995, pp. 1496-1504
Authors:
POMERANZ I
REDDY SM
UPPALURI P
Citation: I. Pomeranz et al., NEST - A NONENUMERATIVE TEST-GENERATION METHOD FOR PATH DELAY FAULTS IN COMBINATIONAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(12), 1995, pp. 1505-1515
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, INCREDYBLE - A NEW SEARCH STRATEGY FOR DESIGN AUTOMATION PROBLEMS WITH APPLICATIONS TO TESTING, I.E.E.E. transactions on computers, 44(6), 1995, pp. 792-804
Authors:
POMERANZ I
REDDY SH
Citation: I. Pomeranz et Sh. Reddy, ON FAULT SIMULATION FOR SYNCHRONOUS SEQUENTIAL-CIRCUITS, I.E.E.E. transactions on computers, 44(2), 1995, pp. 335-340
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ALIASING COMPUTATION USING FAULT SIMULATION WITH FAULT DROPPING, I.E.E.E. transactions on computers, 44(1), 1995, pp. 139-144
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, ON ACHIEVING COMPLETE FAULT COVERAGE FOR SEQUENTIAL-MACHINES, IEEE transactions on computer-aided design of integrated circuits and systems, 13(3), 1994, pp. 378-386
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, AN EFFICIENT NONENUMERATIVE METHOD TO ESTIMATE THE PATH DELAY-FAULT COVERAGE IN COMBINATIONAL-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(2), 1994, pp. 240-250
Authors:
POMERANZ I
REDDY SM
Citation: I. Pomeranz et Sm. Reddy, SPADES-ACE - A SIMULATOR FOR PATH DELAY FAULTS IN SEQUENTIAL-CIRCUITSWITH EXTENSIONS TO ARBITRARY CLOCKING SCHEMES, IEEE transactions on computer-aided design of integrated circuits and systems, 13(2), 1994, pp. 251-263