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Results: 1-25/32
Authors:
RICCO B
Citation: B. Ricco, A STRATEGY FOR THE FUTURE OF THE ASSOCIAT ION, AEI. Automazione, energia, informazione, 85(1), 1998, pp. 43-45
Authors:
ESSENI D
IWAI H
SAITO M
RICCO B
Citation: D. Esseni et al., NONSCALING OF MOSFETS LINEAR RESISTANCE IN THE DEEP-SUBMICROMETER REGIME, IEEE electron device letters, 19(4), 1998, pp. 131-133
Authors:
METRA C
FAVALLI M
RICCO B
Citation: C. Metra et al., CONCURRENT CHECKING OF CLOCK SIGNAL CORRECTNESS, IEEE design & test of computers, 15(4), 1998, pp. 42-48
Authors:
PIERACCI A
RICCO B
Citation: A. Pieracci et B. Ricco, A NEW CHARACTERIZATION METHOD FOR HOT-CARRIER DEGRADATION IN DMOS TRANSISTORS, I.E.E.E. transactions on electron devices, 45(8), 1998, pp. 1855-1858
Authors:
RICCO B
GOZZI G
LANZONI M
Citation: B. Ricco et al., MODELING AND SIMULATION OF STRESS-INDUCED LEAKAGE CURRENT IN ULTRATHIN SIO2-FILMS, I.E.E.E. transactions on electron devices, 45(7), 1998, pp. 1554-1560
Authors:
ESSENI D
PIERACCI A
QUADRELLI M
RICCO B
Citation: D. Esseni et al., HOT-CARRIER-INDUCED ALTERATIONS OF MOSFET CAPACITANCES - A QUANTITATIVE MONITOR FOR ELECTRICAL DEGRADATION, I.E.E.E. transactions on electron devices, 45(11), 1998, pp. 2319-2328
Authors:
LANZONI M
TONDI G
GALBIATI P
RICCO B
Citation: M. Lanzoni et al., AUTOMATIC AND CONTINUOUS OFFSET COMPENSATION OF MOS OPERATIONAL-AMPLIFIERS USING FLOATING-GATE TRANSISTORS, IEEE journal of solid-state circuits, 33(2), 1998, pp. 287-290
Authors:
VERSARI R
RICCO B
Citation: R. Versari et B. Ricco, SCALING OF MAXIMUM CAPACITANCE OF MOSFET WITH ULTRA-THIN OXIDE, Electronics Letters, 34(22), 1998, pp. 2175-2176
Authors:
BOGLIOLO A
BENINI L
DEMICHELI G
RICCO B
Citation: A. Bogliolo et al., GATE-LEVEL POWER AND CURRENT SIMULATION OF CMOS INTEGRATED-CIRCUITS, IEEE transactions on very large scale integration (VLSI) systems, 5(4), 1997, pp. 473-488
Authors:
METRA C
FAVALLI M
OLIVO P
RICCO B
Citation: C. Metra et al., ONLINE DETECTION OF BRIDGING AND DELAY FAULTS IN FUNCTIONAL BLOCKS OFCMOS SELF-CHECKING CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 16(7), 1997, pp. 770-776
Authors:
RICCO B
TONDI G
LANZONI M
Citation: B. Ricco et al., EXTRACTION OF OXIDE THICKNESS FROM HARMONIC DISTORTION OF DISPLACEMENT CURRENTS IN MOS CAPACITORS, I.E.E.E. transactions on electron devices, 44(9), 1997, pp. 1552-1554
Authors:
METRA C
FAVALLI M
RICCO B
Citation: C. Metra et al., 1-OUT-OF-3 CODE CHECKER WITH SINGLE OUTPUT, Electronics Letters, 33(16), 1997, pp. 1373-1374
Authors:
RICCO B
VERSARI R
ESSENI D
Citation: B. Ricco et al., CHARACTERIZATION OF POLYSILICON-GATE DEPLETION IN MOS STRUCTURES, IEEE electron device letters, 17(3), 1996, pp. 103-105
Authors:
BEGIN M
GHANNOUCHI FM
BEAUREGARD F
SELMI L
RICCO B
Citation: M. Begin et al., CHARACTERIZATION OF THE TRANSIENT-BEHAVIOR OF A GAAS-MESFET USING DYNAMIC I-V AND S-PARAMETER MEASUREMENTS, IEEE transactions on instrumentation and measurement, 45(1), 1996, pp. 231-237
Authors:
RICCO B
Citation: B. Ricco, UNIVERSITIES, LINES OF COMMUNICATION, AEI. Automazione, energia, informazione, 82(7-8), 1995, pp. 639-646
Authors:
METRA C
FAVALLI M
OLIVO P
RICCO B
Citation: C. Metra et al., DESIGN OF CMOS CHECKERS WITH IMPROVED TESTABILITY OF BRIDGING AND TRANSISTOR STUCK-ON FAULTS, JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 6(1), 1995, pp. 7-22
Authors:
RICCO B
VERSARI R
ESSENI D
Citation: B. Ricco et al., A NOVEL METHOD TO CHARACTERIZE PARASITIC CAPACITANCES IN MOSFETS, IEEE electron device letters, 16(11), 1995, pp. 485-487
Authors:
ESSENI D
SELMI L
SANGIORGI E
BEZ R
RICCO B
Citation: D. Esseni et al., TEMPERATURE-DEPENDENCE OF GATE AND SUBSTRATE CURRENTS IN THE CHE CROSSOVER REGIME, IEEE electron device letters, 16(11), 1995, pp. 506-508
Authors:
SELMI L
RICCO B
Citation: L. Selmi et B. Ricco, FREQUENCY-RESOLVED MEASUREMENTS FOR THE CHARACTERIZATION OF MOSFET PARAMETERS AT LOW LONGITUDINAL-FIELD, I.E.E.E. transactions on electron devices, 42(2), 1995, pp. 315-320
Authors:
LANZONI M
RICCO B
Citation: M. Lanzoni et B. Ricco, EXPERIMENTAL CHARACTERIZATION OF CIRCUITS FOR CONTROLLED PROGRAMMING OF FLOATING-GATE MOSFETS, IEEE journal of solid-state circuits, 30(6), 1995, pp. 706-709
Authors:
TSUBOI Y
FIEGNA C
SANGIORGI E
RICCO B
WADA T
KATSUMATA Y
IWAI H
Citation: Y. Tsuboi et al., MONTE-CARLO ANALYSIS OF VELOCITY OVERSHOOT EFFECTS IN BIPOLAR-DEVICESWITH AND WITHOUT AN I-LAYER, IEICE transactions on electronics, E77C(2), 1994, pp. 174-178
Authors:
FIEGNA C
IWAI H
WADA T
SAITO M
SANGIORGI E
RICCO B
Citation: C. Fiegna et al., SCALING THE MOS-TRANSISTOR BELOW 0.1 MU-M - METHODOLOGY, DEVICE STRUCTURES, AND TECHNOLOGY REQUIREMENTS, I.E.E.E. transactions on electron devices, 41(6), 1994, pp. 941-951
Authors:
LANZONI M
BRIOZZO L
RICCO B
Citation: M. Lanzoni et al., A NOVEL-APPROACH TO CONTROLLED PROGRAMMING OF TUNNEL-BASED FLOATING-GATE MOSFETS, IEEE journal of solid-state circuits, 29(2), 1994, pp. 147-150
Authors:
METRA C
FAVALLI M
RICCO B
Citation: C. Metra et al., DESIGN OF CMOS SELF-CHECKING SEQUENTIAL-CIRCUITS WITH IMPROVED DETECTABILITY OF BRIDGING FAULTS, Electronics Letters, 30(23), 1994, pp. 1934-1936
Authors:
METRA C
FAVALLI M
RICCO B
Citation: C. Metra et al., NOVEL 1-OUT-OF-N CMOS CHECKER, Electronics Letters, 30(17), 1994, pp. 1398-1400