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Results: 1-25/30
Authors:
LOSANTOS P
CANE C
FLANDRE D
EGGERMONT JP
Citation: P. Losantos et al., MAGNETIC-FIELD SENSOR-BASED ON A THIN-FILM SOI TRANSISTOR, Sensors and actuators. A, Physical, 67(1-3), 1998, pp. 96-101
Authors:
EGGERMONT JP
FLANDRE D
RASKIN JP
COLINGE JP
Citation: Jp. Eggermont et al., POTENTIAL AND MODELING OF 1-MU-M SOI CMOS OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS FOR APPLICATIONS UP TO 1 GHZ, IEEE journal of solid-state circuits, 33(4), 1998, pp. 640-643
Authors:
GENTINNE B
EGGERMONT JP
FLANDRE D
COLINGE JP
Citation: B. Gentinne et al., FULLY DEPLETED SOI-CMOS TECHNOLOGY FOR HIGH-TEMPERATURE IC APPLICATIONS, Materials science & engineering. B, Solid-state materials for advanced technology, 46(1-3), 1997, pp. 1-7
Authors:
FRANCIS P
COLINGE JP
FLANDRE D
Citation: P. Francis et al., COMPARISON OF SELF-HEATING EFFECT IN GAA AND SOI MOSFETS, Microelectronics and reliability, 37(1), 1997, pp. 61-75
Authors:
RASKIN JP
VIVIANI A
FLANDRE D
COLINGE JP
Citation: Jp. Raskin et al., SUBSTRATE CROSSTALK REDUCTION USING SOI TECHNOLOGY, I.E.E.E. transactions on electron devices, 44(12), 1997, pp. 2252-2261
Authors:
FLANDRE D
VIVIANI A
EGGERMONT JP
GENTINNE B
JESPERS PGA
Citation: D. Flandre et al., IMPROVED SYNTHESIS OF GAIN-BOOSTED REGULATED-CASCODE CMOS STAGES USING SYMBOLIC ANALYSIS AND GM ID METHODOLOGY/, IEEE journal of solid-state circuits, 32(7), 1997, pp. 1006-1012
Authors:
EGGERMONT JP
FLANDRE D
RASKIN JP
Citation: Jp. Eggermont et al., POTENTIAL AND MODELING OF 1-MU-M 1GHZ SOI CMOS OTAS, Electronics Letters, 33(9), 1997, pp. 774-775
Authors:
INIGUEZ B
TAMBANI M
DESSARD V
FLANDRE D
Citation: B. Iniguez et al., UNIFIED 1 F NOISE SOI MOSFET MODELING FOR CIRCUIT SIMULATION/, Electronics Letters, 33(21), 1997, pp. 1781-1782
Authors:
CHEN J
COLINGE JP
FLANDRE D
GILLON R
RASKIN JP
VANHOENACKER D
Citation: J. Chen et al., COMPARISON OF TISI2, COSI2, AND NISI FOR THIN-FILM SILICON-ON-INSULATOR APPLICATIONS, Journal of the Electrochemical Society, 144(7), 1997, pp. 2437-2442
Authors:
GENTINNE B
FLANDRE D
COLINGE JP
Citation: B. Gentinne et al., MEASUREMENT AND MODELING OF THIN-FILM ACCUMULATION-MODE SOI P-MOSFET INTRINSIC GATE CAPACITANCES, Solid-state electronics, 39(7), 1996, pp. 1071-1078
Authors:
FLANDRE D
FERREIRA LF
JESPERS PGA
COLINGE JP
Citation: D. Flandre et al., MODELING AND APPLICATION OF FULLY DEPLETED SOI MOSFETS FOR LOW-VOLTAGE, LOW-POWER ANALOG CMOS CIRCUITS, Solid-state electronics, 39(4), 1996, pp. 455-460
Authors:
GENTINNE B
FLANDRE D
COLINGE JP
VANDEWIELE F
Citation: B. Gentinne et al., MEASUREMENT AND 2-DIMENSIONAL SIMULATION OF THIN-FILM SOI MOSFETS - INTRINSIC GATE CAPACITANCES AT ELEVATED-TEMPERATURES, Solid-state electronics, 39(11), 1996, pp. 1613-1619
Authors:
WAINWRIGHT SP
HALL S
FLANDRE D
Citation: Sp. Wainwright et al., THE EFFECT OF SERIES RESISTANCE ON THRESHOLD VOLTAGE MEASUREMENT TECHNIQUES FOR FULLY DEPLETED SOI MOSFETS, Solid-state electronics, 39(1), 1996, pp. 89-94
Authors:
INIGUEZ B
FERREIRA LF
GENTINNE B
FLANDRE D
Citation: B. Iniguez et al., A PHYSICALLY-BASED C-INFINITY-CONTINUOUS FULLY-DEPLETED SOI MOSFET MODEL FOR ANALOG APPLICATIONS, I.E.E.E. transactions on electron devices, 43(4), 1996, pp. 568-575
Authors:
SILVEIRA F
FLANDRE D
JESPERS PGA
Citation: F. Silveira et al., A G(M) I-D BASED METHODOLOGY FOR THE DESIGN OF CMOS ANALOG CIRCUITS AND ITS APPLICATION TO THE SYNTHESIS OF A SILICON-ON-INSULATOR MICROPOWER OTA/, IEEE journal of solid-state circuits, 31(9), 1996, pp. 1314-1319
Authors:
EGGERMONT JP
DECEUSTER D
FLANDRE D
GENTINNE B
JESPERS PGA
COLINGE JP
Citation: Jp. Eggermont et al., DESIGN OF SOI CMOS OPERATIONAL-AMPLIFIERS FOR APPLICATIONS UP TO 300-DEGREES-C, IEEE journal of solid-state circuits, 31(2), 1996, pp. 179-186
Authors:
DECEUSTER D
FLANDRE D
COLINGE JP
CRISTOLOVEANU S
Citation: D. Deceuster et al., IMPROVEMENT OF SOI MOS CURRENT-MIRROR PERFORMANCES USING SERIAL-PARALLEL ASSOCIATION OF TRANSISTORS, Electronics Letters, 32(4), 1996, pp. 278-279
Authors:
FLANDRE D
Citation: D. Flandre, SILICON-ON-INSULATOR TECHNOLOGY FOR HIGH-TEMPERATURE METAL-OXIDE-SEMICONDUCTOR DEVICES AND CIRCUITS, Materials science & engineering. B, Solid-state materials for advanced technology, 29(1-3), 1995, pp. 7-12
Authors:
FRANCIS P
TERAO A
FLANDRE D
VANDEWIELE F
Citation: P. Francis et al., MODERATE INVERSION MODEL OF ULTRATHIN DOUBLE-GATE NMOS SOI TRANSISTORS/, Solid-state electronics, 38(1), 1995, pp. 171-176
Authors:
FRANCIS P
FLANDRE D
COLINGE JP
Citation: P. Francis et al., THEORETICAL CONSIDERATIONS FOR SRAM TOTAL-DOSE HARDENING, IEEE transactions on nuclear science, 42(2), 1995, pp. 83-91
Authors:
FLANDRE D
JESPERS P
Citation: D. Flandre et P. Jespers, CHARGE-SHEET MODELING OF MOS I-V FUNDAMENTAL NONLINEARITIES IN MOSFET-C CONTINUOUS-TIME FILTERS, Electronics Letters, 31(17), 1995, pp. 1419-1420
Authors:
FLANDRE D
CRISTOLOVEANU S
Citation: D. Flandre et S. Cristoloveanu, LATCH AND HOT-ELECTRON GATE CURRENT IN ACCUMULATION-MODE SOI P-MOSFETS, IEEE electron device letters, 15(5), 1994, pp. 157-159
Authors:
FLANDRE D
Citation: D. Flandre, NUMERICAL-ANALYSIS OF SMALL-SIGNAL CHARACTERISTICS OF A FULLY DEPLETED SOI MOSFET - COMMENT, Solid-state electronics, 37(7), 1994, pp. 1447-1448
Authors:
COLINGE JP
FLANDRE D
VANDEWIELE F
Citation: Jp. Colinge et al., SUBTHRESHOLD SLOPE OF LONG-CHANNEL, ACCUMULATION-MODE P-CHANNEL SOI MOSFETS, Solid-state electronics, 37(2), 1994, pp. 289-294
Authors:
FRANCIS P
MICHEL C
FLANDRE D
COLINGE JP
Citation: P. Francis et al., RADIATION-HARD DESIGN FOR SOI MOS INVERTERS, IEEE transactions on nuclear science, 41(2), 1994, pp. 402-407